User guide

Chapter 11: Migrating from Stratix IV to Stratix V Devices 11–3
XAUI PHY
March 2012 Altera Corporation Altera Transceiver PHY IP Core
User Guide
■ reconfig_togxb[3:0] —this single bus connects to all transceiver channels.
If you select additional functionality in the parameter editor for the
ALTGX_RECONFIG IP core, the IP core adds signals to support that functionality. For
more information about the ALTGX_RECONFIG IP core, refer to ALTGX_RECONFIG
Megafunction User Guide for Stratix IV Devices in volume 3 of the Stratix IV Device
Handbook.
XAUI PHY
This section lists the differences between the parameters and signals for the XAUI
PHY IP core and the ALTGX megafunction when configured in the XAUI functional
mode.
Parameter Differences
Table 11–2 lists the XAUI PHY parameters and the corresponding ALTGX
megafunction parameters.
Table 11–2. Comparison of ALTGX Megafunction and XAUI PHY Parameters (Part 1 of 2)
ALTGX Parameter Name (Default Value) XAUI PHY Parameter Name Comments
Number of channels Number of XAUI interfaces
In Stratix V devices, this
parameter is locked to 1 (for
4 channels). You cannot
change it in the current
release.
Train receiver clock and data recover (CDR) from
pll_inclk (On)
Not available as parameters in
the MegaWizard interface
Use assignment editor to
make these assignmentTX PLL bandwidth mode (Auto)
RX CDR bandwidth mode (Auto)