User guide

Parameter Range
Enable tx_enh_frame port
On / Off
Enable rx_enh_frame port
On / Off
Enable rx_enh_frame_dian_status port
On / Off
Table 2-178: Dynamic Reconfiguration Parameters
Parameter Range
Enable dynamic reconfiguration
On / Off
Share reconfiguration interface
On / Off
Enable Altera Debug Master Endpoint
On / Off
Enable embedded debug
On / Off
Enable capability registers
On / Off
Set user-defined IP identifier number
Enable control and status registers
On / Off
Enable prbs soft accumulators
On / Off
Configuration file prefix text string
Generate SystemVerilog package file
On / Off
Generate C header file
On / Off
Table 2-179: Generate Options Parameters
Parameter Range
Generate parameter documentation file
On / Off
How to Enable Low Latency in Basic Enhanced PCS
In the Parameter Editor, use the following settings to enable low latency:
1. Select the Enable 'Enhanced PCS' low latency mode option.
2. Select one of the following gear ratios:
Single-width mode: 32:32, 40:40, 64:64, 66:40, 66:64, or 64:32
2-288
How to Enable Low Latency in Basic Enhanced PCS
UG-01143
2015.05.11
Altera Corporation
Implementing Protocols in Arria 10 Transceivers
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