User guide

3–4 Chapter 3: 10GBASE-R PHY IP Core
Performance and Resource Utilization
Altera Transceiver PHY IP Core User Guide December 2010 Altera Corporation
Performance and Resource Utilization
Table 3–3 shows the typical expected device resource utilization for a single duplex
channel using the current version of the Quartus II software targeting a Stratix IV GT
device. The numbers of combinational ALUTs, logic registers, and memory bits are
rounded to the nearest 100.
Parameter Settings
To configure the 10GBASE-R PHY IP core in the parameter editor, click Installed
Plug-Ins > Interfaces >Ethernet> 10GBASE-R PHY v10.1. The 10GBASE-R PHY IP
core is available for the Stratix IV or Stratix V device family.
This section describes the 10GBASE-R PHY parameters, which you can set using the
parameter editor. Table 3–4 lists the settings available on General Options tab.
f For a description of the Analog options, refer the to “PMA Analog Options” on
page 8–4.
Table 3–3. 10GBASE-R PHY Performance and Resource Utilization—Stratix IV GT Device
Channels Combinational ALUTs Logic Registers (Bits) Memory Bits
1 5200 4100 4700
4 15600 1300 18800
10 38100 32100 47500
Table 3–4. Parameters
Name Value Description
General Options
Device family
Stratix IV GT
Stratix V
The target family. Stratix V devices use a hard PCS. Stratix IV devices
use a soft PCS. Both devices use a hard PMA.
Number of channels
1–32 The total number of 10Gbase-R PHY channels.
Mode of operation
Duplex
TX only
RX only
Stratix V devices allow duplex, TX, or RX mode. Stratix IV GX devices
only support duplex mode.
Reference Clock Frequency
322.265625 MHz
644.53125 MHz
Stratix V devices support both frequencies.Stratix IV GX devices only
support 644.53125 MHz.
Additional Options
Enable additional control and
status pins
On/Off
If you turn this option on, the following 2 signals are brought out to
the top level of the IP core to facilitate debugging:
hi_ber and
block_lock .
Use external PMA control and
reconfig
On/Off
If you turn this option on, the PMA controller and reconfiguration
block are external, rather than included 10GBASE-R PHY IP core,
allowing you to use the same PMA controller and reconfiguration IP
cores for other protocols in the same transceiver quad. This option is
available in Stratix IV devices.
Starting channel number 0–96
Specifies the starting channel number. Must be 0 or a multiple of 4.
You only need to set this parameter if you are using external PMA
and reconfiguration modules.