User guide

6–14 Chapter 6: XAUI PHY IP Core
PMA Channel Controller Interface
Altera Transceiver PHY IP Core November 2012 Altera Corporation
User Guide
PMA Channel Controller Interface
Table 6–11 describes the signals in this interface.
Optional PMA Control and Status Interface
Table 6–12 lists the optional PMA control and status signals available in the soft IP
implementation. You can also access the state of these signals using the Avalon-MM
PHY Management interface to read the control and status registers which are detailed
in XAUI PHY IP Core Registers. However, in some cases, you may need to know the
instantaneous value of a signal to ensure correct functioning of the XAUI PHY. In such
cases, you can include the required signal in the top-level module of your XAUI PHY
IP Core.
Table 6–11. PMA Channel Controller Signals
Signal Name Direction Description
cal_blk_powerdown Input
Powers down the calibration block. A high-to-low transition on this
signal restarts calibration. Only available in Arria II GX, HardCopy IV,
and Stratix IV GX, and Stratix IV GT devices.
gxb_powerdown Input
When asserted, powers down the entire transceiver block. Only
available in Arria II GX, HardCopy IV, and Stratix IV GX, and
Stratix IV GT devices.
pll_powerdown Input
Powers down the CMU PLL. Only available in Arria II GX,
HardCopy IV, and Stratix IV GX, and Stratix IV GT devices.
pll_locked Output
Indicates CMU PLL is locked. Only available in Arria II GX,
HardCopy IV, and Stratix IV GX, and Stratix IV GT devices.
rx_recovered_clk[3:0] Output
This is the RX clock which is recovered from the received data
stream.
rx_ready Output
Indicates PMA RX has exited the reset state and the transceiver can
receive data.
tx_ready Output
Indicates PMA TX has exited the reset state and the transceiver can
transmit data.
Table 6–12. Optional Control and Status Signals—Soft IP Implementation
Signal Name Direction Description
rx_channelaligned Output When asserted, indicates that all 4 RX channels are aligned.
rx_disperr[7:0] Output
Received 10-bit code or data group has a disparity error. It is paired
with
rx_errdetect which is also asserted when a disparity error
occurs. The
rx_disperr signal is 2 bits wide per channel for a total
of 8 bits per XAUI link.
rx_errdetect[7:0] Output
When asserted, indicates an 8B/10B code group violation. It is
asserted if the received 10-bit code group has a code violation or
disparity error. It is used along with the
rx_disperr signal to
differentiate between a code violation error, a disparity error, or
both.The
rx_errdetect signal is 2 bits wide per channel for a total
of 8 bits per XAUI link.