User guide

Chapter 14: Arria V GZ Transceiver Native PHY IP Core 14–15
Standard PCS Parameters
November 2012 Altera Corporation Altera Transceiver PHY IP Core
User Guide
Byte Serializer and Deserializer
The byte serializer and deserializer allow the PCS to operate at twice the data width of
the PMA serializer. This feature allows the PCS to run at a lower frequency and
accommodate a wider range of FPGA interface widths. Table 14–15 describes the byte
serialization and deserialization options you can specify.
f For more information, refer to the Byte Ordering section in the Transceiver Architecture
in Arria V Devices.
8B/10B
The 8B/10B encoder generates 10-bit code groups from the 8-bit data and 1-bit control
identifier. In 8-bit width mode, the 8B/10B encoder translates the 8-bit data to a 10-bit
code group (control word or data word) with proper disparity. The 8B/10B decoder
decodes the data into an 8-bit data and 1-bit control identifier. Table 14–16 describes
the 8B/10B encoder and decoder options.
f
Rate Match FIFO
The rate match FIFO compensates for the very small frequency differences between
the local system clock and the RX recovered clock. Table 14–17 describes the rate
match FIFO parameters.
Table 14–15. Byte Serializer and Deserializer Parameters
Parameter Range Description
Enable TX byte serializer On/Off
When you turn this option On, the PCS includes a TX byte
serializer which allows the PCS to run at a lower clock frequency
to accommodate a wider range of FPGA interface widths.
Enable RX byte deserializer On/Off
When you turn this option On, the PCS includes an RX byte
deserializer and deserializer which allows the PCS to run at a
lower clock frequency to accommodate a wider range of FPGA
interface widths.
Table 14–16. 8B/10B Encoder and Decoder Parameters
Parameter Range Description
Enable TX 8B/10B encoder On/Off
When you turn this option On, the PCS includes the 8B/10B
encoder.
Enable TX 8B/10B disparity
control
On/Off
When you turn this option On, the PCS includes disparity control
for the 8B/10B encoder. Your force the disparity of the 8B/10B
encoder using the
tx_forcedisp control signal.
Enable RX 8B/10B decoder On/Off
When you turn this option On, the PCS includes the 8B/10B
decoder.