User guide

Chapter 14: Arria V GZ Transceiver Native PHY IP Core 14–27
10G PCS Parameters
November 2012 Altera Corporation Altera Transceiver PHY IP Core
User Guide
64b/66b Encoder and Decoder
The 64b/66b encoder and decoder conform to the 10GBASE-R protocol specification
as described in IEEE 802.3-2008 Clause-49. The 64b/66b encoder sub-block receives
data from the TX FIFO and encodes the 64-bit data and 8-bit control characters to the
66-bit data block required by the 10GBASE-R protocol. The transmit state machine in
the 64b/66b encoder sub-block checks the validity of the 64-bit data from the MAC
layer and ensures proper block sequencing.
The 64b/66b decoder sub-block converts the received data from the descrambler into
64-bit data and 8-bit control characters. The receiver state machine sub-block monitors
the status signal from the BER monitor. Table 14–27 describes the 64/66 encoder and
decoder parameters.
Scrambler and Descrambler Parameters
TX scrambler randomizes data to create transitions to create DC-balance and facilitate
CDR circuits based on the x
58
+ x
39
+1 polynomial. The scrambler operates in the
following two modes:
■ Synchronous—The Interlaken protocol requires synchronous mode.
■ Asynchronous (also called self-synchronized)—The 10GBASE-R protocol requires
this mode as specified in IEEE 802.3-2008 Clause-49.
The descrambler block descrambles received data to regenerate unscrambled data
using the x
58
+x
39
+1 polynomial. Table 14–28 describes the scrambler and descrambler
parameters.
.
Table 14–27. 64b/66b Encoder and Decoder Parameters
Parameter Range Description
Enable TX sync header error
insertion
On/Off
When you turn this option On, the 10G PCS records
synchronization header errors as ERR[2:0] This parameter is
valid for the Interlaken and 10GBASE-R protocols.
Enable TX 64b/66b encoder On/Off
When you turn this option On, the 10G PCS includes the TX
64b/66b encoder.
Enable TX 64b/66b encoder On/Off
When you turn this option On, the 10G PCS includes the RX
64b/66b decoder.
Table 14–28. Scrambler and Descrambler Parameters
Parameter Range Description
Enable TX scrambler On/Off
When you turn this option On, the TX 10G PCS datapath includes
the scrambler function. This option is available for the Interlaken
and 10GBASE-R protocols.
TX scrambler seed
User-specified
15-bit value
You must provide a different seed for each lane. This parameter is
only required for the Interlaken protocol.
Enable RX scrambler On/Off
When you turn this option On, the RX 10G PCS datapath includes
the scrambler function. This option is available for the Interlaken
and 10GBASE-R protocols.
Enable rx_10g_descram_err port On/Off
When you turn this option On, the 10G PCS includes the
rx_10g_descram_err port.