User guide

Chapter 15: Cyclone V Transceiver Native PHY IP Core 15–15
Standard PCS Parameters
November 2012 Altera Corporation Altera Transceiver PHY IP Core
User Guide
Bit Reversal and Polarity Inversion
These functions allow you to reverse bit order, byte order, and polarity to correct
errors and to accommodate different layouts of data. Table 15–17 describes these
parameters.
Table 15–17. Bit Reversal and Polarity Inversion Parameters
Parameter Range Description
Enable TX bit reversal On/Off
When you turn this option On, the word aligner reverses TX
parallel data before transmitting it to the PMA for serialization.
You can only change this static setting using the Transceiver
Reconfiguration Controller.
Enable RX bit reversal On/Off
When you turn this option On, the
rx_std_bitrev_ena port
controls bit reversal of the RX parallel data after it passes from
the PMA to the PCS.
Enable RX byte reversal On/Off
When you turn this option On, the word aligner reverses the byte
order before transmitting data. This function allows you to
reverse the order of bytes that were erroneously swapped. The
PCS can swap the ordering of both 8 and10 bit words.
Enable TX polarity inversion On/Off
When you turn this option On, the
tx_std_polinv port controls
polarity inversion of TX parallel data before transmitting the
parallel data to the PMA.
Enable RX polarity inversion On/Off
When you turn this option On, asserting
rx_std_polinv
controls polarity inversion of RX parallel data after PMA
transmission.
Enable rx_std_bitrev_ena port On/Off
When you turn this option On, asserting
rx_std_bitrev_ena
control port causes the RX data order to be reversed from the
normal order, LSB to MSB, to the opposite, MSB to LSB. This
signal is an asynchronous input.
Enable rx_std_byterev_ena port On/Off
When you turn this option On, asserting
rx_std_byterev_ena
input control port swaps the order of the individual 8- or 10-bit
words received from the PMA.
Enable tx_std_polinv port On/Off
When you turn this option On, the
tx_std_polinv input is
enabled. You can use this control port to swap the positive and
negative signals of a serial differential link if they were
erroneously swapped during board layout.
Enable rx_std_polinv port On/Off
When you turn this option On, the
rx_std_polinv input is
enabled. You can use this control port to swap the positive and
negative signals of a serial differential link if they were
erroneously swapped during board layout.
Enable tx_std_elecidle port On/Off
When you turn this option On, the
tx_std_elecidle input port
is enabled. When this signal is asserted, it forces the transmitter
to electrical idle.
Enable rx_std_signaldetect port On/Off
When you turn this option On, the optional
rx_std_signaldetect output port is enabled. This signal is
required for the PCI Express protocol. If enabled, the signal
threshold detection circuitry senses whether the signal level
present at the RX input buffer is above the signal detect threshold
voltage that you specified.