User guide

20–8 Additional InformationAdditional Information
Revision History
Altera Transceiver PHY IP Core November 2012 Altera Corporation
User Guide
10GBASE-R
February 2012 1.5
■ Added datapath latency numbers for Stratix V devices.
■ Corrected bit range for ERRORED_BLOCK_COUNT .
■ Added statement that the the cal_blk_powerdown (0x021) and pma_tx_pll_is_locked
(0x022) registers are only available when the Use external PMA control and reconfig option
is turned On on the Additional Options tab of the GUI.
■ Clarified that the BER count functionality is for Stratix IV devices only.
■ Removed pma_rx_signaldetect register. The 10GBASE-R PHY does not support this
functionality.
XAUI
February 2012 1.5
■ Removed reset bits at register 0x081. The reset implemented Cat register 0x044 provides
more comprehensive functionality.
■ Removed pma_rx_signaldetect register. The XAUI PHY does not support this
functionality.
PCI Express (PIPE)
February 2012 1.5
■ Updated definition of fixedclk . It can be derived from pll_ref_clk .
Custom
February 2012 1.5
■ Removed register definitions for Low Latency PHY.
Low Latency PHY
February 2012 1.5
■ Added register definitions for Low Latency PHY.
Deterministic Latency PHY
February 2012 1.5
■ Removed pma_rx_signaldetect register. The Deterministic Latency PHY does not
support this functionality.
■ Updated the definition of deterministic latency word alignment mode to include the fact that
the word alignment pattern, which is currently forced to K28.5 = 0011111010 is always
placed in the least significant byte (LSB) of a word with a fixed latency of 3 cycles.
Transceiver Reconfiguration Controller
February 2012 1.5
■ Added DFE.
Introduction
December
2011
1.4
■ Revised discussion of embedded reset controller to include the fact that this reset controller
can be disabled for some transceiver PHYs.
10GBASE-R
December
2011
1.4
■ Removed description of calibration block powerdown register (0x021) which is not available
for this transceiver PHY.
■ Changed definition of phy_mgmt_clk_reset . This signal is active high and level sensitive.
XAUI
December
2011
1.4
■ Changed definition of phy_mgmt_clk_reset . This signal is active high and level sensitive.
■ Added Arria II GX to device support table.
Date Version Changes Made