User's Manual

Revision History xv
22007E/0—November 1999 AMD Athlon™ Processor x86 Code Optimization
Revision History
Date Rev Description
Nov.
1999
E
Added “About this Document” on page 1.
Further clarification of “Consider the Sign of Integer Operands” on page 14.
Added the optimization, “Use Array Style Instead of Pointer Style Code” on page 15.
Added the optimization, “Accelerating Floating-Point Divides and Square Roots” on page 29.
Clarified examples in “Copy Frequently De-referenced Pointer Arguments to Local Variables” on page 31.
Further clarification of “Select DirectPath Over VectorPath Instructions” on page 34.
Further clarification of “Align Branch Targets in Program Hot Spots” on page 36.
Further clarification of REP instruction as a filler in “Code Padding Using Neutral Code Fillers” on page 39.
Further clarification of “Use the 3DNow!™ PREFETCH and PREFETCHW Instructions” on page 46.
Modified examples 1 and 2 of “Unsigned Division by Multiplication of Constant” on page 78.
Added the optimization, “Efficient Implementation of Population Count Function” on page 91.
Further clarification of “Use FFREEP Macro to Pop One Register from the FPU Stack” on page 98.
Further clarification of “Minimize Floating-Point-to-Integer Conversions” on page 100.
Added the optimization, “Check Argument Range of Trigonometric Instructions Efficiently” on page 103.
Added the optimization, “Take Advantage of the FSINCOS Instruction” on page 105.
Further clarification of “Use 3DNow!™ Instructions for Fast Division” on page 108.
Further clarification “Use FEMMS Instruction” on page 107.
Further clarification of “Use 3DNow!™ Instructions for Fast Square Root and Reciprocal Square Root” on
page 110.
Clarified “3DNow!™ and MMX™ Intra-Operand Swapping” on page 112.
Corrected PCMPGT information in “Use MMX™ PCMP Instead of 3DNow!™ PFCMP” on page 114.
Added the optimization, “Use MMX™ Instructions for Block Copies and Block Fills” on page 115.
Modified the rule for “Use MMX™ PXOR to Clear All Bits in an MMX™ Register” on page 118.
Modified the rule for “Use MMX™ PCMPEQD to Set All Bits in an MMX™ Register” on page 119.
Added the optimization, “Optimized Matrix Multiplication” on page 119.
Added the optimization, “Efficient 3D-Clipping Code Computation Using 3DNow!™ Instructions” on page
122.
Added the optimization, “Complex Number Arithmetic” on page 126.
Added Appendix E, “Programming the MTRR and PAT”.
Rearranged the appendices.
Added Index.