User's Manual

156 Write-Combining Definitions and Abbreviations
AMD Athlon Processor x86 Code Optimization
22007E/0November 1999
Write-Combining Definitions and Abbreviations
This appendix uses the following definitions and abbreviations:
UCUncacheable memory type
WCWrite-combining memory type
WTWritethrough memory type
WPWrite-protected memory type
WBWriteback memory type
One Byte8 bits
One Word16 bits
Longword32 bits (same as a x86 doubleword)
Quadword64 bits or 2 longwords
Octaword128 bits or 2 quadwords
Cache Block64 bytes or 4 octawords or 8 quadwords
What is Write Combining?
Write combining is the merging of multiple memory write
cycles that target locations within the address range of a write
buffer. The AMD Athlon processor combines multiple
memory-write cycles to a 64-byte buffer whenever the memory
address is within a WC or WT memory type region. The
processor continues to combine writes to this buffer without
writing the data to the system, as long as certain rules apply
(see Table 9 on page 158 for more information).
Programming Details
The steps required for programming write combining on the
AMD Athlon processor are as follows:
1. Verify the presence of an AMD Athlon processor by using
the CPUID instruction to check for the instruction family
code and vendor identification of the processor. Standard
function 0 on AMD processors returns a vendor
identification string of AuthenticAMD in registers EBX,
EDX, and ECX. Standard function 1 returns the processor