User's Manual

206 Instruction Dispatch and Execution Resources
AMD Athlon™ Processor x86 Code Optimization
22007E/0—November 1999
SUB reg8, mreg8 2Ah 11-xxx-xxx DirectPath
SUB reg8, mem8 2Ah mm-xxx-xxx DirectPath
SUB reg16/32, mreg16/32 2Bh 11-xxx-xxx DirectPath
SUB reg16/32, mem16/32 2Bh mm-xxx-xxx DirectPath
SUB AL, imm8 2Ch DirectPath
SUB EAX, imm16/32 2Dh DirectPath
SUB mreg8, imm8 80h 11-101-xxx DirectPath
SUB mem8, imm8 80h mm-101-xxx DirectPath
SUB mreg16/32, imm16/32 81h 11-101-xxx DirectPath
SUB mem16/32, imm16/32 81h mm-101-xxx DirectPath
SUB mreg16/32, imm8 (sign extended) 83h 11-101-xxx DirectPath
SUB mem16/32, imm8 (sign extended) 83h mm-101-xxx DirectPath
SYSCALL 0Fh 05h VectorPath
SYSENTER 0Fh 34h VectorPath
SYSEXIT 0Fh 35h VectorPath
SYSRET 0Fh 07h VectorPath
TEST mreg8, reg8 84h 11-xxx-xxx DirectPath
TEST mem8, reg8 84h mm-xxx-xxx DirectPath
TEST mreg16/32, reg16/32 85h 11-xxx-xxx DirectPath
TEST mem16/32, reg16/32 85h mm-xxx-xxx DirectPath
TEST AL, imm8 A8h DirectPath
TEST EAX, imm16/32 A9h DirectPath
TEST mreg8, imm8 F6h 11-000-xxx DirectPath
TEST mem8, imm8 F6h mm-000-xxx DirectPath
TEST mreg8, imm16/32 F7h 11-000-xxx DirectPath
TEST mem8, imm16/32 F7h mm-000-xxx DirectPath
VERR mreg16 0Fh 00h 11-100-xxx VectorPath
VERR mem16 0Fh 00h mm-100-xxx VectorPath
VERW mreg16 0Fh 00h 11-101-xxx VectorPath
VERW mem16 0Fh 00h mm-101-xxx VectorPath
WAIT 9Bh DirectPath
WBINVD 0Fh 09h VectorPath
WRMSR 0Fh 30h VectorPath
Table 19. Integer Instructions (Continued)
Instruction Mnemonic
First
Byte
Second
Byte
ModR/M
Byte
Decode
Type