User's Manual

220 DirectPath Instructions
AMD Athlon™ Processor x86 Code Optimization
22007E/0—November 1999
Table 25. DirectPath Integer Instructions
Instruction Mnemonic
ADC mreg8, reg8
ADC mem8, reg8
ADC mreg16/32, reg16/32
ADC mem16/32, reg16/32
ADC reg8, mreg8
ADC reg8, mem8
ADC reg16/32, mreg16/32
ADC reg16/32, mem16/32
ADC AL, imm8
ADC EAX, imm16/32
ADC mreg8, imm8
ADC mem8, imm8
ADC mreg16/32, imm16/32
ADC mem16/32, imm16/32
ADC mreg16/32, imm8 (sign extended)
ADC mem16/32, imm8 (sign extended)
ADD mreg8, reg8
ADD mem8, reg8
ADD mreg16/32, reg16/32
ADD mem16/32, reg16/32
ADD reg8, mreg8
ADD reg8, mem8
ADD reg16/32, mreg16/32
ADD reg16/32, mem16/32
ADD AL, imm8
ADD EAX, imm16/32
ADD mreg8, imm8
ADD mem8, imm8
ADD mreg16/32, imm16/32
ADD mem16/32, imm16/32
ADD mreg16/32, imm8 (sign extended)
ADD mem16/32, imm8 (sign extended)
AND mreg8, reg8
AND mem8, reg8
AND mreg16/32, reg16/32
AND mem16/32, reg16/32
AND reg8, mreg8
AND reg8, mem8
AND reg16/32, mreg16/32
AND reg16/32, mem16/32
AND AL, imm8
AND EAX, imm16/32
AND mreg8, imm8
AND mem8, imm8
AND mreg16/32, imm16/32
AND mem16/32, imm16/32
AND mreg16/32, imm8 (sign extended)
AND mem16/32, imm8 (sign extended)
BSWAP EAX
BSWAP ECX
BSWAP EDX
BSWAP EBX
BSWAP ESP
BSWAP EBP
BSWAP ESI
BSWAP EDI
BT mreg16/32, reg16/32
BT mreg16/32, imm8
BT mem16/32, imm8
CBW/CWDE
CLC
CMC
CMOVA/CMOVBE reg16/32, reg16/32
CMOVA/CMOVBE reg16/32, mem16/32
CMOVAE/CMOVNB/CMOVNC reg16/32, mem16/32
CMOVAE/CMOVNB/CMOVNC mem16/32, mem16/32
CMOVB/CMOVC/CMOVNAE reg16/32, reg16/32
CMOVB/CMOVC/CMOVNAE mem16/32, reg16/32
Table 25. DirectPath Integer Instructions (Continued)
Instruction Mnemonic