User's Manual

DirectPath Instructions 229
22007E/0—November 1999 AMD Athlon™ Processor x86 Code Optimization
Table 28. DirectPath Floating-Point Instructions
Instruction Mnemonic
FABS
FADD ST, ST(i)
FADD [mem32real]
FADD ST(i), ST
FADD [mem64real]
FADDP ST(i), ST
FCHS
FCOM ST(i)
FCOMP ST(i)
FCOM [mem32real]
FCOM [mem64real]
FCOMP [mem32real]
FCOMP [mem64real]
FCOMPP
FDECSTP
FDIV ST, ST(i)
FDIV ST(i), ST
FDIV [mem32real]
FDIV [mem64real]
FDIVP ST, ST(i)
FDIVR ST, ST(i)
FDIVR ST(i), ST
FDIVR [mem32real]
FDIVR [mem64real]
FDIVRP ST(i), ST
FFREE ST(i)
FFREEP ST(i)
FILD [mem16int]
FILD [mem32int]
FILD [mem64int]
FIMUL [mem32int]
FIMUL [mem16int]
FINCSTP
FIST [mem16int]
FIST [mem32int]
FISTP [mem16int]
FISTP [mem32int]
FISTP [mem64int]
FLD ST(i)
FLD [mem32real]
FLD [mem64real]
FLD [mem80real]
FLD1
FLDL2E
FLDL2T
FLDLG2
FLDLN2
FLDPI
FLDZ
FMUL ST, ST(i)
FMUL ST(i), ST
FMUL [mem32real]
FMUL [mem64real]
FMULP ST, ST(i)
FNOP
FPREM
FPREM1
FSQRT
FST [mem32real]
FST [mem64real]
FST ST(i)
FSTP [mem32real]
FSTP [mem64real]
FSTP [mem80real]
FSTP ST(i)
FSUB [mem32real]
FSUB [mem64real]
FSUB ST, ST(i)
Table 28. DirectPath Floating-Point Instructions
Instruction Mnemonic