user manual

204 Instruction Dispatch and Execution Resources
AMD Athlon™ Processor x86 Code Optimization
22007E/0—November 1999
SETS mreg8 0Fh 98h 11-xxx-xxx DirectPath
SETS mem8 0Fh 98h mm-xxx-xxx DirectPath
SETNS mreg8 0Fh 99h 11-xxx-xxx DirectPath
SETNS mem8 0Fh 99h mm-xxx-xxx DirectPath
SETP/SETPE mreg8 0Fh 9Ah 11-xxx-xxx DirectPath
SETP/SETPE mem8 0Fh 9Ah mm-xxx-xxx DirectPath
SETNP/SETPO mreg8 0Fh 9Bh 11-xxx-xxx DirectPath
SETNP/SETPO mem8 0Fh 9Bh mm-xxx-xxx DirectPath
SETL/SETNGE mreg8 0Fh 9Ch 11-xxx-xxx DirectPath
SETL/SETNGE mem8 0Fh 9Ch mm-xxx-xxx DirectPath
SETGE/SETNL mreg8 0Fh 9Dh 11-xxx-xxx DirectPath
SETGE/SETNL mem8 0Fh 9Dh mm-xxx-xxx DirectPath
SETLE/SETNG mreg8 0Fh 9Eh 11-xxx-xxx DirectPath
SETLE/SETNG mem8 0Fh 9Eh mm-xxx-xxx DirectPath
SETG/SETNLE mreg8 0Fh 9Fh 11-xxx-xxx DirectPath
SETG/SETNLE mem8 0Fh 9Fh mm-xxx-xxx DirectPath
SGDT mem48 0Fh 01h mm-000-xxx VectorPath
SIDT mem48 0Fh 01h mm-001-xxx VectorPath
SHL/SAL mreg8, imm8 C0h 11-100-xxx DirectPath
SHL/SAL mem8, imm8 C0h mm-100-xxx DirectPath
SHL/SAL mreg16/32, imm8 C1h 11-100-xxx DirectPath
SHL/SAL mem16/32, imm8 C1h mm-100-xxx DirectPath
SHL/SAL mreg8, 1 D0h 11-100-xxx DirectPath
SHL/SAL mem8, 1 D0h mm-100-xxx DirectPath
SHL/SAL mreg16/32, 1 D1h 11-100-xxx DirectPath
SHL/SAL mem16/32, 1 D1h mm-100-xxx DirectPath
SHL/SAL mreg8, CL D2h 11-100-xxx DirectPath
SHL/SAL mem8, CL D2h mm-100-xxx DirectPath
SHL/SAL mreg16/32, CL D3h 11-100-xxx DirectPath
SHL/SAL mem16/32, CL D3h mm-100-xxx DirectPath
SHR mreg8, imm8 C0h 11-101-xxx DirectPath
SHR mem8, imm8 C0h mm-101-xxx DirectPath
SHR mreg16/32, imm8 C1h 11-101-xxx DirectPath
Table 19. Integer Instructions (Continued)
Instruction Mnemonic
First
Byte
Second
Byte
ModR/M
Byte
Decode
Type