user manual

208 Instruction Dispatch and Execution Resources
AMD Athlon Processor x86 Code Optimization
22007E/0November 1999
Table 20. MMX Instructions
Instruction Mnemonic
Prefix
Byte(s)
First
Byte
ModR/M
Byte
Decode
Type
FPU Pipe(s) Notes
EMMS 0Fh 77h DirectPath FADD/FMUL/FSTORE
MOVD mmreg, reg32 0Fh 6Eh 11-xxx-xxx VectorPath 1
MOVD mmreg, mem32 0Fh 6Eh mm-xxx-xxx DirectPath FADD/FMUL/FSTORE
MOVD reg32, mmreg 0Fh 7Eh 11-xxx-xxx VectorPath 1
MOVD mem32, mmreg 0Fh 7Eh mm-xxx-xxx DirectPath FSTORE
MOVQ mmreg1, mmreg2 0Fh 6Fh 11-xxx-xxx DirectPath FADD/FMUL
MOVQ mmreg, mem64 0Fh 6Fh mm-xxx-xxx DirectPath FADD/FMUL/FSTORE
MOVQ mmreg2, mmreg1 0Fh 7Fh 11-xxx-xxx DirectPath FADD/FMUL
MOVQ mem64, mmreg 0Fh 7Fh mm-xxx-xxx DirectPath FSTORE
PACKSSDW mmreg1, mmreg2 0Fh 6Bh 11-xxx-xxx DirectPath FADD/FMUL
PACKSSDW mmreg, mem64 0Fh 6Bh mm-xxx-xxx DirectPath FADD/FMUL
PACKSSWB mmreg1, mmreg2 0Fh 63h 11-xxx-xxx DirectPath FADD/FMUL
PACKSSWB mmreg, mem64 0Fh 63h mm-xxx-xxx DirectPath FADD/FMUL
PACKUSWB mmreg1, mmreg2 0Fh 67h 11-xxx-xxx DirectPath FADD/FMUL
PACKUSWB mmreg, mem64 0Fh 67h mm-xxx-xxx DirectPath FADD/FMUL
PADDB mmreg1, mmreg2 0Fh FCh 11-xxx-xxx DirectPath FADD/FMUL
PADDB mmreg, mem64 0Fh FCh mm-xxx-xxx DirectPath FADD/FMUL
PADDD mmreg1, mmreg2 0Fh FEh 11-xxx-xxx DirectPath FADD/FMUL
PADDD mmreg, mem64 0Fh FEh mm-xxx-xxx DirectPath FADD/FMUL
PADDSB mmreg1, mmreg2 0Fh ECh 11-xxx-xxx DirectPath FADD/FMUL
PADDSB mmreg, mem64 0Fh ECh mm-xxx-xxx DirectPath FADD/FMUL
PADDSW mmreg1, mmreg2 0Fh EDh 11-xxx-xxx DirectPath FADD/FMUL
PADDSW mmreg, mem64 0Fh EDh mm-xxx-xxx DirectPath FADD/FMUL
PADDUSB mmreg1, mmreg2 0Fh DCh 11-xxx-xxx DirectPath FADD/FMUL
PADDUSB mmreg, mem64 0Fh DCh mm-xxx-xxx DirectPath FADD/FMUL
PADDUSW mmreg1, mmreg2 0Fh DDh 11-xxx-xxx DirectPath FADD/FMUL
PADDUSW mmreg, mem64 0Fh DDh mm-xxx-xxx DirectPath FADD/FMUL
PADDW mmreg1, mmreg2 0Fh FDh 11-xxx-xxx DirectPath FADD/FMUL
PADDW mmreg, mem64 0Fh FDh mm-xxx-xxx DirectPath FADD/FMUL
PAND mmreg1, mmreg2 0Fh DBh 11-xxx-xxx DirectPath FADD/FMUL
PAND mmreg, mem64 0Fh DBh mm-xxx-xxx DirectPath FADD/FMUL
Notes:
1. Bits 2, 1, and 0 of the modR/M byte select the integer register.