user manual

214 Instruction Dispatch and Execution Resources
AMD Athlon™ Processor x86 Code Optimization
22007E/0—November 1999
FIADD [mem32int] DAh mm-000-xxx VectorPath
FIADD [mem16int] DEh mm-000-xxx VectorPath
FICOM [mem32int] DAh mm-010-xxx VectorPath
FICOM [mem16int] DEh mm-010-xxx VectorPath
FICOMP [mem32int] DAh mm-011-xxx VectorPath
FICOMP [mem16int] DEh mm-011-xxx VectorPath
FIDIV [mem32int] DAh mm-110-xxx VectorPath
FIDIV [mem16int] DEh mm-110-xxx VectorPath
FIDIVR [mem32int] DAh mm-111-xxx VectorPath
FIDIVR [mem16int] DEh mm-111-xxx VectorPath
FILD [mem16int] DFh mm-000-xxx DirectPath FSTORE
FILD [mem32int] DBh mm-000-xxx DirectPath FSTORE
FILD [mem64int] DFh mm-101-xxx DirectPath FSTORE
FIMUL [mem32int] DAh mm-001-xxx VectorPath
FIMUL [mem16int] DEh mm-001-xxx VectorPath
FINCSTP D9h F7h DirectPath FADD/FMUL/FSTORE
FINIT DBh E3h VectorPath
FIST [mem16int] DFh mm-010-xxx DirectPath FSTORE
FIST [mem32int] DBh mm-010-xxx DirectPath FSTORE
FISTP [mem16int] DFh mm-011-xxx DirectPath FSTORE
FISTP [mem32int] DBh mm-011-xxx DirectPath FSTORE
FISTP [mem64int] DFh mm-111-xxx DirectPath FSTORE
FISUB [mem32int] DAh mm-100-xxx VectorPath
FISUB [mem16int] DEh mm-100-xxx VectorPath
FISUBR [mem32int] DAh mm-101-xxx VectorPath
FISUBR [mem16int] DEh mm-101-xxx VectorPath
FLD ST(i) D9h 11-000-xxx DirectPath FADD/FMUL 1
FLD [mem32real] D9h mm-000-xxx DirectPath FADD/FMUL/FSTORE
FLD [mem64real] DDh mm-000-xxx DirectPath FADD/FMUL/FSTORE
FLD [mem80real] DBh mm-101-xxx VectorPath
FLD1 D9h E8h DirectPath FSTORE
Table 22. Floating-Point Instructions (Continued)
Instruction Mnemonic
First
Byte
Second
Byte
ModR/M
Byte
Decode
Type
FPU
Pipe(s)
Note
Notes:
1. The last three bits of the modR/M byte select the stack entry ST(i).