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Instruction Dispatch and Execution Resources 215
22007E/0—November 1999 AMD Athlon™ Processor x86 Code Optimization
FLDCW [mem16] D9h mm-101-xxx VectorPath
FLDENV [mem14byte] D9h mm-100-xxx VectorPath
FLDENV [mem28byte] D9h mm-100-xxx VectorPath
FLDL2E D9h EAh DirectPath FSTORE
FLDL2T D9h E9h DirectPath FSTORE
FLDLG2 D9h ECh DirectPath FSTORE
FLDLN2 D9h EDh DirectPath FSTORE
FLDPI D9h EBh DirectPath FSTORE
FLDZ D9h EEh DirectPath FSTORE
FMUL ST, ST(i) D8h 11-001-xxx DirectPath FMUL 1
FMUL ST(i), ST DCh 11-001-xxx DirectPath FMUL 1
FMUL [mem32real] D8h mm-001-xxx DirectPath FMUL
FMUL [mem64real] DCh mm-001-xxx DirectPath FMUL
FMULP ST, ST(i) DEh 11-001-xxx DirectPath FMUL 1
FNOP D9h D0h DirectPath FADD/FMUL/FSTORE
FPTAN D9h F2h VectorPath
FPATAN D9h F3h VectorPath
FPREM D9h F8h DirectPath FMUL
FPREM1 D9h F5h DirectPath FMUL
FRNDINT D9h FCh VectorPath
FRSTOR [mem94byte] DDh mm-100-xxx VectorPath
FRSTOR [mem108byte] DDh mm-100-xxx VectorPath
FSAVE [mem94byte] DDh mm-110-xxx VectorPath
FSAVE [mem108byte] DDh mm-110-xxx VectorPath
FSCALE D9h FDh VectorPath
FSIN D9h FEh VectorPath
FSINCOS D9h FBh VectorPath
FSQRT D9h FAh DirectPath FMUL
FST [mem32real] D9h mm-010-xxx DirectPath FSTORE
FST [mem64real] DDh mm-010-xxx DirectPath FSTORE
FST ST(i) DDh 11-010xxx DirectPath FADD/FMUL
Table 22. Floating-Point Instructions (Continued)
Instruction Mnemonic
First
Byte
Second
Byte
ModR/M
Byte
Decode
Type
FPU
Pipe(s)
Note
Notes:
1. The last three bits of the modR/M byte select the stack entry ST(i).