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VectorPath Instructions 233
22007E/0—November 1999 AMD Athlon™ Processor x86 Code Optimization
MUL EAX, mem32
OUT imm8, AL
OUT imm8, AX
OUT imm8, EAX
OUT DX, AL
OUT DX, AX
OUT DX, EAX
POP ES
POP SS
POP DS
POP FS
POP GS
POP EAX
POP ECX
POP EDX
POP EBX
POP ESP
POP EBP
POP ESI
POP EDI
POP mreg 16/32
POP mem 16/32
POPA/POPAD
POPF/POPFD
PUSH ES
PUSH CS
PUSH FS
PUSH GS
PUSH SS
PUSH DS
PUSH mreg16/32
PUSH mem16/32
PUSHA/PUSHAD
PUSHF/PUSHFD
Table 29. VectorPath Integer Instructions (Continued)
Instruction Mnemonic
RCL mem8, imm8
RCL mem16/32, imm8
RCL mem8, CL
RCL mem16/32, CL
RCR mem8, imm8
RCR mem16/32, imm8
RCR mem8, CL
RCR mem16/32, CL
RDMSR
RDPMC
RDTSC
RET near imm16
RET near
RET far imm16
RET far
SAHF
SCASB AL, mem8
SCASW AX, mem16
SCASD EAX, mem32
SGDT mem48
SIDT mem48
SHLD mreg16/32, reg16/32, imm8
SHLD mem16/32, reg16/32, imm8
SHLD mreg16/32, reg16/32, CL
SHLD mem16/32, reg16/32, CL
SHRD mreg16/32, reg16/32, imm8
SHRD mem16/32, reg16/32, imm8
SHRD mreg16/32, reg16/32, CL
SHRD mem16/32, reg16/32, CL
SLDT mreg16
SLDT mem16
SMSW mreg16
SMSW mem16
STD
Table 29. VectorPath Integer Instructions (Continued)
Instruction Mnemonic