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VectorPath Instructions 235
22007E/0—November 1999 AMD Athlon™ Processor x86 Code Optimization
Table 32. VectorPath Floating-Point Instructions
Instruction Mnemonic
F2XM1
FBLD [mem80]
FBSTP [mem80]
FCLEX
FCMOVB ST(0), ST(i)
FCMOVE ST(0), ST(i)
FCMOVBE ST(0), ST(i)
FCMOVU ST(0), ST(i)
FCMOVNB ST(0), ST(i)
FCMOVNE ST(0), ST(i)
FCMOVNBE ST(0), ST(i)
FCMOVNU ST(0), ST(i)
FCOMI ST, ST(i)
FCOMIP ST, ST(i)
FCOS
FIADD [mem32int]
FIADD [mem16int]
FICOM [mem32int]
FICOM [mem16int]
FICOMP [mem32int]
FICOMP [mem16int]
FIDIV [mem32int]
FIDIV [mem16int]
FIDIVR [mem32int]
FIDIVR [mem16int]
FIMUL [mem32int]
FIMUL [mem16int]
FINIT
FISUB [mem32int]
FISUB [mem16int]
FISUBR [mem32int]
FISUBR [mem16int]
FLD [mem80real]
FLDCW [mem16]
FLDENV [mem14byte]
FLDENV [mem28byte]
FPTAN
FPATAN
FRNDINT
FRSTOR [mem94byte]
FRSTOR [mem108byte]
FSAVE [mem94byte]
FSAVE [mem108byte]
FSCALE
FSIN
FSINCOS
FSTCW [mem16]
FSTENV [mem14byte]
FSTENV [mem28byte]
FSTP [mem80real]
FSTSW AX
FSTSW [mem16]
FUCOMI ST, ST(i)
FUCOMIP ST, ST(i)
FXAM
FXTRACT
FYL2X
FYL2XP1
Table 32. VectorPath Floating-Point Instructions (Continued)
Instruction Mnemonic