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22007E/0—November 1999 AMD Athlon™ Processor x86 Code Optimization
Avoid Branches Dependent on Random Data 57
6
Branch Optimizations
While the AMD Athlon™ processor contains a very
sophisticated branch unit, certain optimizations increase the
effectiveness of the branch prediction unit. This chapter
discusses rules that improve branch prediction and minimize
branch penalties. Guidelines are listed in order of importance.
Avoid Branches Dependent on Random Data
Avoid conditional branches depending on random data, as these
are difficult to predict. For example, a piece of code receives a
random stream of characters “A” through “Z” and branches if
the character is before “M” in the collating sequence.
Data-dependent branches acting upon basically random data
causes the branch prediction logic to mispredict the branch
about 50% of the time.
If possible, design branch-free alternative code sequences,
which results in shorter average execution time. This technique
is especially important if the branch body is small. Examples 1
and 2 illustrate this concept using the CMOV instruction. Note
that the AMD-K6
®
processor does not support the CMOV
instruction. Therefore, blended AMD-K6 and AMD Athlon
processor code should use examples 3 and 4.
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