User Manual

AMD Ryzen Processor Overclocking User’s Guide
55931 Rev. 1.0 March 2, 2017
30
Glossary of Terms
Chapter 8 Glossary of Terms
The following table provides further information on the commonly used terms.
Term
Description
AM4
AM4 is an AMD single-socket client infrastructure supporting DDR4
memory
CCLK
CPU Core Clock
CCX
Core Complex where more than one core shares L3 resources.
Core
The instruction execution unit of the processor when the term Core is used in
an x86 core context.
CPU
The total resources of the specific processor model consisting of Cores
and cache memory
CoreCOF
Core current operating frequency in MHz
FCLK
Data Fabric clock – equal to Memory clock
L1 cache
The level 1 caches (instruction cache and the data cache).
L2 cache
The level 2 caches.
L3 cache
Level 3 Cache.
MEMCLK
Internal and external memory clock
Memory interface
• 2 Unified Memory Controllers (UMC), each supporting one DRAM channel
• 2 DDR4 PHYs. Each PHY supports:
• 64-bit data
• One DRAM channel per PHY, two DIMMs per channel
• DDR4 transfer rates from 1333 MT/s to 2667 MT/s
• UDIMM, RDIMM, LRDIMM, SODIMM, NVDIMM, Flash DIMM and
3DS support
Processor
The complete product that encompasses the CPU, memory interface and other
computing resources.
P-state
Processor Performance State. P-states are valid combinations of CPU voltage
and CPU COF
SMT
Simultaneous Multi Threading.
Thread
One architectural context for instruction execution.
UCLK
Internal Memory Controller clock – equal to Memory clock
VDDCR_CPU
The VDDCR_CPU voltage is the VID-requested VDDCR_CPU supply level.
VDDCR_SOC
The VDDCR_SOC voltage is the VID-requested VDDCR_SOC supply level.
Table 1: Glossary of Terms