User's Manual

Interfaces
Version 0.4
AMIMON Confidential 10
3.2.1 I
2
S Bus Specification
The AMN11310 supports a standardized communication structure inter-IC sound (I
2
S) bus. As shown in Figure 5,
the bus has three lines: continuous serial clock (SCK), word select (WS) and serial data (SD). The external
device generating SCK and WS is the audio source.
Figure 5: I
2
S Simple System Configurations and Basic Interface Timing
The AMN11310 supports an I
2
S format of up to 32 bits for each channel (left and right). The serial data is latched
into the AMN11310 on the leading (LOW to HIGH) edge of the clock signal. The WS is also latched on the
leading edge of the clock signal. The WS line should change one clock period before the first bit of the channel is
transmitted.
The AMN11310 transmits explicit clock SD and WS and does not process the audio content. The input audio at
the transmitter end is mirrored to the receiver end. The source may have different word lengths, up to 32 bits.
However, the AMN11310 always samples and transmits 24 bits over the wireless link.
3.2.1.1 Timing Requirements
Table 4: I2S Audio Interface Timing Requirements
Symbol Parameter MIN TYP MAX Units
TSCKCYC SCK period 325 976 ns
TSCKFREQ SCK frequency 1.024 3.072 MHz
TSCKDUTY SCK duty cycle 40 60 %
TDCKSETUP Setup time to SCK rising edge 25 ns
TDCKHOLD Hold time to SCK rising edge 25 ns