User's Manual

Interfaces
Version 0.4
AMIMON Confidential 11
3.2.1.2 Timing Diagram
T
SCKCYC
T
DCKSETUP
T
DCKHOLD
T
SCKDUTY
SCK
SD,WS
50%
Figure 6: I
2
S Input Timings
3.2.2 S/PDIF Bus
3.2.2.1 Timing Requirements
The AMN11310 does not require the SPDIF clock. The clock is produced internally by sampling the SPDIF data
input at a high clock rate and processing it.
Table 5: Audio Interface Timing Requirements
Symbol Parameter Condition MIN TYP MAX Units
TSPCYC SPDIF data sampling rate 162 488 ns
TSPFREQ SPDIF data sampling freq 2.048 6.144 MHz