Specifications

Page 19
FIREFINDER SERIES II INSTALLATION, COMMISSIONING &
OPERATION
4.12 Main CPU
The Main CPU holds the main central processing unit for the FACP.
 The CPU is a 4-layer surface mount board
 The processor (IC1) is a Motorola MC68302, running at 16MHz.
 The external data bus is 16 bits wide.
 The board has 256 Kbytes (128K x 16) of EPROM (IC2, IC3).
 4Mbytes (2M x 16) of FLASH (IC9).
 1Mbytes (512K x 16) of static RAM (IC4, IC5).
 IC8 is a programmable logic device which implements control signal timing and decoding.
 External address, data and control lines are buffered by IC10, IC11, IC13, IC14 and IC15.
 IC7 is a watchdog control and will reset the processor if an error occurs in software
execution.
 Two sockets (IC2 and IC3) are provided for 27C010 EPROMS.
 IC2 provides the even bytes. (D0 toD7) and IC3 the odd bytes (D8 to D15)
Connections
CN2
To Main Board CN11
C21
R28
R22
C12
C13
C11
C14
C9
C8
R5 R4
R1
R2
R17
R20 R19
C7
C6
R7
R12
R9
R18 R10 R3
R8
R6
C2
C1
R13
C4
R25
C16
R21 R14
302-675 A
R24
R15
R11
R27
U15
C3
C5
C15
C17
C18
U4
U5
U1
XL1
U2
U3
D1
R26
D2
CN2
U11
U10
U14
U13
U8
U7
C19
C20
U9
U12
R16
R23
302-675 A
1
1
1
1
1
1
1
1
1
1
302-675 Bottom Overlay
302-675 Top Overlay
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CN2
Figure 18: The Main CPU Board PCB Layout