Specifications

Hardware Configuration
2–9
Figure 2-3 Write-Back Cache Configuration (W10)
2.4 DRAM
The board has positions for two 72-pin Single In-line Memory Modules (SIMMs), U1 and U2. 72-pin
SIMMs are organized as a 32-bit data bus, so you can use either one or two modules, depending on
your memory needs. 72-pin SIMMs come in 1M byte, 4M byte, 8M byte, 16M byte, and 32M byte
versions. Any mix of SIMMs can be accommodated. The ROM BIOS automatically detects the
memory modules that are installed and configures accordingly.
Specify page mode DRAMs with access times of 70 nS or less. 4M byte, 16M byte, and 32M byte
versions have been tested and qualified by Ampro. 4M bytes is the minimum configuration. Since
the quality of commercial DRAM modules can vary, test the Little Board/486i with the memory you
select.
Note
Some memory modules are “taller” than others. The tall
SIMMs will increase the thickness dimension of the Little
Board/486i to 1.35 inches or more.
On-board memory is allocated as follows (standard for the PC architecture):
! The first 640K bytes of DRAM are assigned to the DOS region 00000h to 9FFFFh.
! DRAM in the top 384K bytes of the first 1M byte is not available for user programs. DRAM is
mapped into the top 64K to shadow the ROM BIOS. DRAM can also be mapped into a portion
of this region to shadow a video BIOS (a SETUP option). (Shadowing is described in the
following section.)
! The remaining memory is mapped to extended memory starting at the 1M byte boundary.
A more detailed memory map is provided in Chapter 3.
When the system boots, the BIOS measures the amount of memory installed and configures the
internal memory controller for that amount. (No jumpering or manual configuration is required.) The
amount it measured can be displayed by running SETUP. Saving SETUP automatically stores this
figure in the Configuration Memory.