Specifications

Little Board/486i Technical Manual
3–8
;=====================================================================
init: mov ah,1ch
mov al,-1
mov bx,414Dh
mov cx,5052h
int 10h
;=====================================================================
Compare this SETUP option with the POST Test Display option (see below), which affects only the POST
display.
3.4.8 POST Test Display
Enable or disable POST display. If set to Disable, the messages from the POST will not be sent to the
console. To inhibit display of a broader range of system and application messages, see Video State,
above.
3.4.9 Byte-Wide Socket Configuration
There are three configuration values for the byte-wide sockets in SETUP.
! Each byte-wide socket, S0 and S1, can be independently configured for its starting address and the
size of the memory block in which it appears to the processor, or it can be disabled.
! Specify which socket, S0, S1, both, or neither, is enabled at boot time using the Enable Socket
parameter.
Table 3-3 lists the socket address configuration options that are available.
Size Address
Disabled None
64K bytes D0000h – DFFFFh
64K bytes E0000h – EFFFFh
128K bytes D0000h – EFFFFh
Table 3-3 Byte-Wide Memory Configuration
If you configure both byte-wide sockets to occupy the same address space (or overlap), control logic on
the board gives priority to socket S0. To access S1 in such cases, you must disable S0. The ROM BIOS
provides a function for enabling and disabling the sockets. A code example is shown later in this chapter,
in the section labeled “Byte-Wide Sockets”. Refer to Ampro Application Note AAN-9210 for a complete
description of the BIOS functions that control the byte-wide sockets.
Devices larger than 64K or 128K can be installed, independent of the memory block size setting. The
memory block size setting specifies a “window” in which the memory device is visible. You can use an
extended BIOS call to select which 64K or 128K page of the installed device is visible to the processor.
A code example is shown later in this chapter, in the section labeled “Byte-Wide Sockets”.