Little Board™/P5i Technical Manual P/N: 5001121 Revision: H Ampro Computers, Incorporated 4757 Hellyer Avenue San Jose, CA 95138 Tel (408) 360-0200 FAX (408) 360-0220 WEBSITE: www.ampro.
NOTICES DISCLAIMER Ampro Computers, Incorporated makes no representations or warranties with respect to the contents of this manual or of the associated Ampro products, and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose. Ampro shall under no circumstances be liable for incidental or consequential damages or related expenses resulting from the use of this product, even if it has been notified of the possibility of such damages.
Little Board/P5i Technical Manual PREFACE This manual is for integrators and programmers of systems based on the Ampro Little Board™/P5i single board system. It contains information about hardware specifications, jumpering and installation, details about system setup, and how to configure peripheral drivers. There are three chapters, organized as follows: Chapter 1—Introduction. General information pertaining to the Little Board/P5i, its features, and specifications.
TABLE OF CONTENTS CHAPTER 1—INTRODUCTION 1.1 General Description ............................................................................................................... 1–1 1.2 Features ................................................................................................................................. 1–1 1.2.1 Enhanced Reliability .............................................................................................. 1–4 1.3 Software .............................................
Little Board/P5i Technical Manual 2.8.1 IDE Connector Configuration (J12, J17) ................................................................ 2–22 2.8.2 IDE Interface Configuration................................................................................... 2–22 2.9 UltraSCSI Interface ............................................................................................................... 2–23 2.9.1 SCSI Interface Configuration ................................................................
3.7 SETUP 5—Power Management Setup.................................................................................... 3–13 3.8 SETUP 6—PCI Configuration Setup...................................................................................... 3–15 3.9 Operation with DOS .............................................................................................................. 3–16 3.10 Serial Ports ........................................................................................................
Little Board/P5i Technical Manual FIGURES Figure 1–1 Mechanical Dimensions ............................................................................................. 1–16 Figure 1–2 Block Diagram........................................................................................................... 1–17 Figure 2–1 Connector and Jumper Locations ............................................................................... 2–3 Figure 2–2 Serial 3 Interrupt Configuration (W4, W6)......................
Table 2–19 J9 Mating Connector ................................................................................................. 2–24 Table 2–20 Typical Byte-wide Devices........................................................................................ 2–26 Table 2–21 EPROM Jumpering for S0 ......................................................................................... 2–29 Table 2–22 Flash EPROM Jumpering for S0................................................................................
CHAPTER 1 INTRODUCTION 1.1 GENERAL DESCRIPTION The Little Board/P5i is a high integration, high performance Pentium-based PC/AT compatible system in the footprint of a 5 1/4 inch disk drive. This rugged and high quality single-board system contains all the component subsystems of a PC/AT PCI motherboard plus the equivalent of six expansion boards. The Little Board/P5i is designed to meet the size, power consumption, temperature range, quality, and reliability demands of embedded applications.
Little Board/P5i Technical Manual Solid State Disk (SSD) support. Uses solid state memory in place of a rotating media drive (see below). Watchdog timer. Monitors boot process; provides function call for applications Fast boot operation. Normal or accelerated POST Fail-safe boot support. Intelligently retries boot devices until successful Battery-free boot support. Saves system SETUP information in non-volatile EEPROM Serial console option.
Introduction Ampro's SSD Support Software, any DOS-based application, including the operating system, utilities, drivers, and application programs, can easily be run from SSD without modification. SSD operation is also supported by a growing number of real-time operating systems. The 32-pin byte-wide socket can be configured for nearly every available 28-pin and 32-pin standard JEDEC byte-wide memory device.
Little Board/P5i Technical Manual High-speed PCI Architecture. The video controller provides an optimized 32-bit path between the CPU and video memory. Graphical User Interface (GUI) Accelerator. This feature can dramatically boost the performance of Windows®, Windows®95, and many graphics-intensive applications. Color Flat-Panel Support. Up to 16 million colors can be displayed on color TFT LCD flat panels and up to 226,981 colors on color STN LCD panels. Display Centering and Stretching.
Introduction ISO 9001 Manufacturing. Ampro is a certified ISO 9001 vendor. Regulatory testing. Knowing that many embedded systems must qualify under EMC emissions susceptibility testing, Ampro designs boards with careful attention to EMI issues. Boards are tested in standard enclosures to ensure that they can pass such emissions tests.
Little Board/P5i Technical Manual 1.4.1 Little Board Development Chassis Whatever your Little Board application, there will always be a need for an engineering development cycle. To help developers quickly assemble an embedded system, Ampro offers the Little Board Development Chassis. It includes a power supply, 3.5 inch 1.44M floppy disk drive, IDE hard drive, speaker, I/O connectors, a backplane for ISA and PCI expansion cards, and mounting studs for the Little Board.
Introduction − Onboard programming of 5 V and 12 V Flash EPROMs − Onboard +12 V power supply for Flash EPROM programming of the ROM BIOS or Flash device in the byte-wide socket.
Little Board/P5i Technical Manual − Supports one or two drives − Reliable digital phase-locked loop circuit − BIOS supports all standard PC/AT formats: 360K, 1.2M, 720K, and 1.44M PCI EIDE Disk Controller − A PCI bus implementation of an Extended IDE (EIDE) hard disk controller − Supports up to four hard disk drives.
Introduction − Controller: SMC9000-series − Topology: Ethernet bus, using CSMA/CD − Media interface options: − 10BaseT (twisted pair), via an onboard RJ45 connector − AUI, via an onboard header connector, DB15F (transition cable available from Ampro) − 10Base2 (thin coax), via external MAU − Data rate: 10M bits per second − Data buffer: 4608 byte RAM, accessed via I/O ports − I/O base address options: 300h, 320h, 360h, or 380h − Interrupt options: IRQ3, IRQ9 (default), IRQ10, IRQ11 − Bo
Little Board/P5i Technical Manual 1.5.5 Mechanical and Environmental Specifications 8.0 x 5.75 x 1.2* inches (146 x 203 x 30 mm). Refer to Figure 1–1 for mounting dimensions. * Note: this specification depends on the height of the DRAM SIMM module. Some versions of DRAM SIMM modules can exceed this specification. Power requirements (typical, with 8M byte DRAM) – 100 MHz: 2.6A @ 5V DC – 133 MHz 2.3A @ 5V DC – 166 MHz 2.
Introduction Table 1–1 Summary of Video Modes and DRAM Requirements Video Standard Maximum Resolution Maximum Colors Displayed Video RAM Requirement* (Bytes) CGA Graphics 320 x 200 640 x 200 4 2 512K 512K CGA Text 640 x 200 16 512K MDA 720 x 350 Mono 512K EGA 640 x 350 16 512K VGA 320 x 200 640 x 480 256 16 512K 512K VESA (Standard SuperVGA) 640 x 480 800 x 600 1024 x 768 640 x 480 640 x 480 640 x 480 1024 x 768 1280 x 1084 256 256 16 32K 64K 16 M 256 16 512K 512K 512K 1M 1M 1M
Little Board/P5i Technical Manual Table 1–2 Flat Panel Controller Display Capabilities Resolution CRT Colors Mono LCD Gray Scales DD STN LCD Colors 9-bit TFT LCD Color Video Memory Simultaneous Display? 320 x 200 256/256K 61/61 256/226,981 256/185,193 512K Yes 640 x 480 16/256K 16/61 16/226,981 16/185,193 512K Yes 640 x 480 256/256K 61/61 256/226,981 256/185,193 512K Yes 800 x 600 16/256K 16/61 16/226,981 16/185,193 512K Requires 1M 800 x 600 256/256K 61/61 256/226,98
Introduction Table 1–4 Supported CRT Video Modes—Standard VGA (Cont.) Mode Display Mode Colors Text Font Pixels Clock (MHz) Horiz (KHz) Vert (Hz) E Planar 16 80x25 8x8 640x200 25.175 31.5 70 F Planar Mono 80x25 8x14 640x350 25.175 31.5 70 10 Planar 16 80x25 8x14 640x350 25.175 31.5 70 11 Planar 2 80x30 8x16 640x480 25.175 31.5 60 12 Planar 16 80x30 8x16 640x480 25.175 31.5 60 13 Packed Pixel 256 40x25 8x8 320x200 25.175 31.
Little Board/P5i Technical Manual Table 1–5 Supported CRT Video Modes—Extended Resolution Mode Display Mode Colors Text Font Pixels Clock (MHz) Horiz (KHz) Vert (Hz) Mem. CRT 20 4-bit Linear 16 80x30 8x16 640x480 25.175 31.5 60 512K a, b, c 22 4-bit Linear 16 100x37 8x16 800x600 40.000 37.5 60 512K b,c 24 4-bit Linear 16 128x48 8x16 1024x768 65.000 48.5 60 512K c 44.900 35.5 43 512K b,c 24I 30 8-bit Linear 256 80x30 8x16 640x480 25.175 31.
Introduction Table 1–6 Supported CRT Video Modes—High Refresh Mode Display Mode Colors Text Font Pixels Clock (MHz) Horiz (KHz) Vert (Hz) Mem. CRT 12 Planar 16 80x30 8x16 640x480 31.500 37.5 75 256K b, c 30 8-bit Linear 256 80x30 8x16 640x480 31.500 37.5 75 256K c 79 Packed Pixel 256 80x30 8x16 640x480 31.500 37.5 75 512K c 6A,70 Planar 16 100x37 8x16 800x600 49.500 46.9 75 512K c 32 8-bit Linear 256 100x37 8x16 800x600 49.500 46.
Little Board/P5i Technical Manual .162 .062 0 0 .360 .435 .55 5.350 4.150 3.950 3.000 2.550 2.400 1.550 1.000 .400 0 .100 SIMM Height (Varies) .250 .900 .930 J16 J12 1 J17 J14 .125 HOLES, .250 PADS (8 Places) 1 J9 1 J15 1 1 1 1 1 J8 J11 J13 1 6.800 6.350 7.600 7.150 1 1 7.100 J10 1 7.600 7.500 7.400 J100 7.800 5.800 1 S0 J21 5.700 J7 J22 5.975 P2C P2D 3.500 1 3.100 2.800 2.700 P1B P1A 2.650 2.500 J18 1 1.900 1.050 .900 J19 1 U2 U1 .650 .
Introduction Figure 1–2 Block Diagram 1–17
Little Board/P5i Technical Manual 1–18
CHAPTER 2 HARDWARE CONFIGURATION 2.1 INTRODUCTION This chapter covers configuring the Little Board/P5i and using on-board and peripheral devices.
Little Board/P5i Technical Manual Table 2–1 Connector Summary 2–2 Connector Function Size Key Pin P1 A/B PC/104 Expansion Bus 64-Pin B10 P2 C/D PC/104 Expansion Bus 40-pin C19 J3 Flat Panel Video 50-pin None J4 VEE Bias Supply Connector 12-pin 3, 10 J5 CRT Video 10-pin None J6 Video External Overlay 60-pin .050 in.
Hardware Configuration Figure 2–1 Connector and Jumper Locations 2–3
Little Board/P5i Technical Manual 2.1.2 Connectors The I/O connectors are shrouded dual-row male headers for use with flat ribbon (IDC) female connectors and ribbon cable. Ampro recommends that you use “center-bump polarized” connectors to prevent accidentally installing cables backwards. Use non-strain-relief connectors to stay within the vertical height envelope shown in Figure 1–1. Many of the connectors have “key pins”.
Hardware Configuration Table 2–2 Configuration Jumper Summary Jumper Function On Off 1/2 2/3 Enabled Disabled - - W1 Video Controller Enable W2 Byte-wide Backup Battery Connected Not Connected - - W3 SCSI Termination Power Connected Not Connected - - W4 Serial 3 IRQ Select - No IRQ IRQ4 IRQ12 W5 Serial 4 IRQ Select - No IRQ IRQ3 IRQ10 W6 Serial 1 and 3 IRQ4 Sharing No Share IRQ4 Sharing - - W7 Serial 2 and 4 IRQ3 Sharing No Share IRQ3 Sharing - - W8 +5V for
Little Board/P5i Technical Manual 2.2 DC POWER The power connector J10 is a 7-pin polarized connector. Refer to Table 2–3 for power connections and Table 2–4 for mating connector information. Caution Be sure the power plug is wired correctly before applying power to the board! See Table 2–3. Table 2–3 Power Connector (J10) Pin Signal Name Function 1, 7 +5VDC +5VDC ±5% input 2, 3, 6 Ground Ground return 4 +12VDC +12VDC ±5% input 5 +3.3VDC +3.
Hardware Configuration can connect a +12V supply to the Little Board module through the power connector, J10. This will supply +12V to the ISA and PCI portions of the PC/104 expansion busses. Similarly, you can connect -12V to J16, the Utility Connector, to supply those voltages to both expansion busses, and -5V to J16 to supply -5V. Pinouts for the Utility Connector are provided in Table 2–36. If a PCI expansion card requiring 3.
Little Board/P5i Technical Manual To connect the external battery to byte-wide socket S0 to back up an SRAM, install jumpers on W2 and W21-2/3. If you use another type of memory device in S0, you must remove W2 and install a jumper on W21-1/2. 2.2.4 Cooling Requirements The Pentium CPU, DRAM SIMMs, video controller, and core logic chips draw most of the power and generate most of the heat. The board is designed to support various speed versions of the Pentium from 100 MHz to 166 MHz with 66 MHz clocks.
Hardware Configuration Note Some memory modules are “taller” than others. The tall SIMMs will increase the thickness dimension of the Little Board/P5. On-board memory is allocated as follows (standard for the PC architecture): The first 640K bytes of DRAM are assigned to the DOS region 00000h to 9FFFFh. DRAM in the top 384K bytes of the first 1M byte is not available for user programs. DRAM is mapped into this area to shadow the ROM BIOS, video BIOS, and PCI drivers.
Little Board/P5i Technical Manual All ports support software selectable standard baud rates up to 115.2.2K bits/second, 5-8 data bits, and 1, 1.5, or 2 stop bits. Note that the IEEE RS232C specification limits the serial port to 19.2K bits/second on cables up to 50 feet in length. RS-485 Adapter Power (W1) Install a jumper on W8 if you attach an Ampro RS485 Adapter to Serial 4 (J13). It supplies +5 volt power to the adapter through J13-11. 2.5.
Hardware Configuration Figure 2–3 Serial 4 Interrupt Configuration (W5, W7) When a serial port is disabled, leave its jumpers off to make its IRQ available to other peripherals installed on the PC/104 expansion bus. For information about disabling the serial ports using SETUP, see Chapter 3. 2.5.3 ROM-BIOS Installation of the Serial Ports Normally, the ROM BIOS supports Serial 1 as the DOS COM1 device, Serial 2 as the DOS COM2 device, and so on.
Little Board/P5i Technical Manual Table 2–7 Serial Port Connectors (J11, J13) Ports Serial 1 (J11) or Serial 3 (J13) Serial 2 (J11) or Serial 4 (J13) * Pin Signal Name Function In/Out DB25 Pin DB9 Pin 1 DCD Data Carrier Detect IN 8 1 2 DSR Data Set Ready IN 6 6 3 RXD Receive Data IN 3 2 4 RTS Request To Send OUT 4 7 5 TXD Transmit Data OUT 2 3 6 CTS Clear to Send IN 5 8 7 DTR Data Terminal Ready OUT 20 4 8 RI Ring Indicator IN 22 9 9 GND Signal G
Hardware Configuration 2.5.5 Serial Console Unique to Ampro is ROM BIOS support for using a serial console (keyboard and display) in place of the conventional video controller, monitor, and keyboard. See Chapter 3 for an explanation of the serial console option. 2.5.6 Serial Downloader Also unique to Ampro is ROM BIOS support for downloading a program from a host computer via a serial port. The program is then run as if it had been loaded from disk.
Little Board/P5i Technical Manual 2.6.2 ROM-BIOS Installation of Parallel Ports Normally, the BIOS assigns the name LPT1 to the primary parallel port, and LPT2 to the secondary parallel port (if present), and so on. However, the BIOS scans the standard addresses for parallel ports and if it only finds a secondary port, it assigns LPT1 to that one.
Hardware Configuration Table 2–10 Parallel Port Connector (J15) J15 Pin Signal Name Function In/Out DB25 Pin 1 STROBE* Output data strobe OUT 1 3 Data 0 LSB of printer data I/O 2 5 Data 1 I/O 3 7 Data 2 I/O 4 9 Data 3 I/O 5 11 Data 4 I/O 6 13 Data 5 I/O 7 15 Data 6 I/O 8 17 Data 7 MSB of printer data I/O 9 19 ACK* Character accepted IN 10 21 BUSY Cannot receive data IN 11 23 PAPER OUT Out of paper IN 12 25 SEL OUT Printer selected IN 13 2 AU
Little Board/P5i Technical Manual Table 2–11 J15 Mating Connector Connector Type RIBBON Mating Connector 3M 3399-7600 Latching Clip 3505-8026 DISCRETE WIRE MOLEX HOUSING 22-55-2262 PIN 16-02-0103 Note For maximum reliability, keep the cable between the board and the device it drives to 10 feet or less in length. IEEE-1284-compliant Cables Using the parallel port for high-speed data transfer in ECP/EPP modes requires special cabling for maximum reliability.
Hardware Configuration 2.7 FLOPPY DISK INTERFACE The on-board floppy disk controller and ROM BIOS support one or two floppy disk drives in any of the standard DOS formats shown in Table 2–12. Table 2–12 Supported Floppy Formats Capacity Drive Size Tracks Data Rate 360K 5-1/4 inch 40 250 KHz 1.2M 5-1/4 inch 80 500 KHz 720K 3-1/2 inch 80 250 KHz 1.44M 3-1/2 inch 80 500 KHz 2.7.
Little Board/P5i Technical Manual 2.7.3 Floppy Interface Connector (J14) Table 2–13 shows the pinout and signal definitions of the floppy disk interface connector, J14. The pinout of J14 meets the AT standard for floppy drive cables. Table 2–14 shows the manufacturer’s part numbers for mating connectors.
Hardware Configuration 2.8 EIDE HARD DISK INTERFACE The Little Board/P5i provides an interface for up to four Integrated Device Electronics (IDE) peripheral devices, such as hard disk drives and CD-ROM drives. A standard IDE interface appears at connector J12, a 40-pin, dual-row connector. Additional signals needed for a third and fourth drive appear on J17. (If you only intend to connect one or two drives, you do not need to connect a cable to J17.
Little Board/P5i Technical Manual Table 2–15 IDE Interface Connector (J12) 2–20 Pin Signal Name Function In/Out 1 HOST RESET* Reset signal from host OUT 2 GND Ground OUT 3 HOST D7 Data bit 7 I/O 4 HOST D8 Data bit 8 I/O 5 HOST D6 Data bit 6 I/O 6 HOST D9 Data bit 9 I/O 7 HOST D5 Data bit 5 I/O 8 HOST D10 Data bit 10 I/O 9 HOST D4 Data bit 4 I/O 10 HOST D11 Data bit 11 I/O 11 HOST D3 Data bit 3 I/O 12 HOST D12 Data bit 12 I/O 13 HOST D2 Data bit 2 I/O
Hardware Configuration Table 2–15 IDE Interface Connector (J12) (cont.
Little Board/P5i Technical Manual Table 2–17 J12, J17 Mating Connectors Connector Type RIBBON, 40 wire RIBBON, 20 wire DISCRETE WIRE Mating Connector 3M 3417-7600 Latching Clip 3505-8040 3M 3421-7600 Latching Clip 3505-8020 MOLEX HOUSING 22-55-2402 PIN 16-02-0103 2.8.1 IDE Connector Configuration (J12, J17) The two IDE interface connectors are physically oriented to allow for constructing simple ribbon cables. The signal locations on the connectors are also arranged to support this.
Hardware Configuration 2.9 ULTRASCSI INTERFACE The Little Board/P5i features a PCI Small Computer System Interface (UltraSCSI) controller. The SCSI port uses a 50-pin male header connector (J9) to interface with peripherals. This connector provides an 8bit path to the peripheral device, standard for most peripherals. The controller subsystem is internally connected to the PCI expansion bus. Table 2–18 SCSI Interface Connector (J9) shows the pinout and signal definitions of the SCSI interface.
Little Board/P5i Technical Manual Table 2–18 SCSI Interface Connector (J9) Pin Signal Function 2 DB0* Data Bit 0 (LSB) 4 DB1* Data Bit 1 6 DB2* Data Bit 2 8 DB3* Data Bit 3 10 DB4* Data Bit 4 12 DB5* Data Bit 5 14 DB6* Data Bit 6 16 DB7* Data Bit 7 18 DBP* Data Bit Parity 26 TERM PWR Termination +5V DC 32 ATN* Attention 34 GROUND Signal Ground 36 BSY* Busy 38 ACK* Transfer Acknowledge 40 RST* Reset 42 MSG* Message 44 SEL* Select 46 C/D* Control/Data
Hardware Configuration 2.9.1 SCSI Interface Configuration Configure the SCSI interface according to your system’s needs. This is covered in the following paragraphs. Interrupt Request Assignment The SCSI interface is a PCI peripheral and is assigned to the PCI INTA interrupt. No user setup is required Active Terminators The SCSI interface uses “active terminators” for the SCSI bus.
Little Board/P5i Technical Manual Solid State Disk (SSD) drive Table 2–20 shows representative byte-wide memory devices that can be installed in the byte-wide socket. The table gives examples of generic part numbers, the size of the device (K bytes), and the DIP package pin count. It also lists the SSD device type, used by the Ampro Solid State Disk (SSD) Support Software to identify memory devices.
Hardware Configuration Figure 2–7 Using 28-pin Devices in a 32-pin Socket 2.10.1 Addressing the Byte-Wide Socket Use SETUP (described in Chapter 3) to enable or disable the socket, and specify whether the byte-wide socket or the OEM Flash device is enabled by the BIOS upon system initialization. Byte-Wide Socket Address When enabled, the byte-wide socket resides in a 64K contiguous block starting a D0000h.
Little Board/P5i Technical Manual The byte-wide device is accessed as an 8-bit device, compared to DRAM which is accessed as 64 bits. The device is accessed from the PC expansion bus which is much slower than the high-speed processor memory bus. You can improve performance substantially by copying the contents of the byte-wide device into DRAM and executing the DRAM copy. 2.10.
Hardware Configuration Table 2–21 EPROM Jumpering for S0 EPROM (Typical Devices) Pins 8K EPROM 27C64 16K EPROM 27C128 8K EEPROM 28C64 28 32K EPROM 27C256 28 64K EPROM 27C512 28 128K EPROM 27C010 32 256K EPROM 27C020 32 512K EPROM 27C040 32 1M EPROM 32 27C080 Jumper Diagram 2–29
Little Board/P5i Technical Manual 2.10.5 Using Flash EPROMs Flash programming power for +12V Flash devices is provided by an on-board power supply. You do not need to connect an external +12V power supply to program Flash devices. Programming power is switched under software control so that it is applied only during the actual programming process (to prevent accidental corruption of the data).
Hardware Configuration 2.10.6 Using SRAMs If you install an SRAM in socket S0, you can provide backup power from an external battery connected to J16 when power is off by shorting W2 and W21-2/3. The external battery power is connected to the SRAM through a low forward voltage drop Schottky diode and a solid state switch that senses the state of Vcc (+5V). Note Some byte-wide devices draw battery backup current through their chip select lines when power is off.
Little Board/P5i Technical Manual Table 2–24 Byte-Wide Jumper Pin Signals (W15) W15 Pin Signal Name 1 -- 2 Vpp 3 -- 4 A18 Address A18 (static) 5 Pin 3 Connection to pin 3 of the byte-wide socket 6 A19 Address A19 (static) 7 Pin 33 8 SMEMW* 9 Pin 31 Connection to pin 31 of the byte-wide socket 10 SA15 Address SA15 from the expansion bus 11 Pin 5 Connection to pin 5 of the byte-wide socket 12 SA14 Address SA14 from the expansion bus 13 A17 14 Pin 32 Connection to pin 32
Hardware Configuration Table 2–25 Video Connector Summary Name Connector Pins/Type Flat Panel J3 LCD Bias Supply Option J4 CRT J5 External Video Overlay J6 50-pin Shrouded .100 Header Description Provides connections for a broad array of standard flat panel displays. Intended for standard 50-wire ribbon cable. 12-pin .100 Header Ampro provides a small add-on board that will supply the Vee voltage for most common LCD flat panel displays. It mounts to this connector.
Little Board/P5i Technical Manual Table 2–26 CRT Interface Connector (J5) Pin Signal Name DB-15 1 Red 1 2 Ground 6 3 Green 2 4 Ground 7 5 Blue 3 6 Ground 8 7 Horizontal Sync. 13 8 Ground 10 9 Vertical Sync. 14 10 Ground 4, 5, 9, 11, 12, 15 Table 2–27 J5 Mating Connectors Connector Type RIBBON DISCRETE WIRE Mating Connector 3M 3473-7600 Latching Clip 3505-8010 MOLEX HOUSING 22-55-2102 PIN 16-02-0103 2.11.
Hardware Configuration Table 2–28 lists the signals available on connector J3. Table 2–28 Flat Panel Video Connector (J3) Pin Signal Name 2, 34, 37 +5V +5 Volt supply from Little Board/P5i 3 +12V +12 Volt supply (from J10) 5 ShfClk Shift Clock. Pixel clock for flat panel data. Sometimes called Video Clock. Jumper selectable polarity (W23). 7 M M signal for panel AC drive control. Sometimes called ACDCLK or AC Drive. May also be configured to be -BLANK or as Display Enable (DE) for TFT panels.
Little Board/P5i Technical Manual Table 2–29 J3 Mating Connectors Connector Type RIBBON DISCRETE WIRE Mating Connector 3M 4325-7600 MOLEX HOUSING 55-22-2502 PIN 16-02-0103 Flat Panel Shift Clock Polarity Some flat panels require an inverted shift clock. A jumper, W23 is provided for this purpose. Set the jumper block on W23 as shown in Figure 2–8.
Hardware Configuration 2.11.3 The LCD Bias Supply Option The LCD Bias Supply Option is a small circuit board that supplies Vee power to an LCD display. The board converts the +5V from the Little Board/P5i to the Vee voltage (between 15V and 35V) required by most LCD panels, and makes this voltage available on the flat panel connector J3.
Little Board/P5i Technical Manual Note Incorrect Vee polarity or voltage can damage an LCD panel. Set the polarity and voltage on the Vee supply before connecting the LCD panel. Attaching an External Contrast Control Vee controls the contrast of the LCD display. (Do not confuse this with a backlight, which illuminates the screen using one or more fluorescent tubes. Backlights generally require a high voltage AC supply.
Hardware Configuration Example: Suppose the following values are shown in the panel’s data sheet: Vee Max = 24 V Vee min = 20 V Calculate the required resistor values as follows: Ra = (270 / ((24 / 1.5) - 1)) -12 Ra = 6K Ω Rb = (270 / ((20 / 1.5) - 1)) -12 - 6 Rb = 3.9K Ω 2.11.4 External Video Overlay Connector (J6) This section describes the External Video Overlay Connector (J6). The interface at this connector is used to overlay externally-generated RGB video over the internal VGA data stream.
Little Board/P5i Technical Manual Table 2–31 External Video Overlay Connector (J6) J6 Pin Name Function 13 PCV R0 Red Video Data 0 (Input) 15 PCV R1 Red Video Data 1 (Input) 17 PCV G0 Grn Video Data 0 (Input) 19 VSYNC Vertical Sync (output) 21 HSYNC Horizontal Sync (output) 23 PCV G1 Grn Video Data 1 (Input) 25 PCV B0 Blue Video Data 0 (Input) 27 PCV B1 Blue Video Data 1 (Input) 29 PCLK Pixel Clock (output) 31 CLRKEY Color Key (Input) 33 PCV R2 Red Video Data 2 (Input)
Hardware Configuration Table 2–32 J6 Mating Connector Mating Connector AMP 1-111196-1 (latching connector) 2.11.5 Disabling the Video Controller The video controller can be disabled by removing the jumper on W1. The default state is enabled, with the jumper installed. 2.12 ETHERNET NETWORK INTERFACE This section describes how to configure and connect the Ethernet LAN interface.
Little Board/P5i Technical Manual 2.12.1 Setting up a Boot PROM If you plan to boot from the network, you must provide a boot ROM program compatible with your network operating system. You install this program in the Expansion BIOS ROM, a Flash EPROM device provided on the board. Complete details are provided in Chapter 3. Briefly, these are the steps you take: In SETUP, enable S1, the Expansion BIOS ROM. Remove jumper W9 and install jumper W13 to write-enable the Flash device.
Hardware Configuration AUI Interface (J8) You can connect the Ethernet interface to a LAN through the standard Adapter Unit Interface (AUI) connection. The AUI connects to an external transceiver or MAU which, in turn, connects to the LAN cable. The AUI enables you to connect your node to fiber optic, thick net cable, or other Ethernet media, with the appropriate MAU. Connect the AUI adapter cable to J8. Ampro offers an optional AUI adapter cable to connect between J8 and a standard MAU adapter cable.
Little Board/P5i Technical Manual Table 2–35 J8 Mating Connector Connector Type RIBBON DISCRETE WIRE Mating Connector 3M 3473-7600 MOLEX HOUSING 22-55-2102 Pin 16-02-0103 2.13 BATTERY-BACKED CLOCK An AT-compatible battery-backed real-time clock (with CMOS RAM) is standard on the Little Board/P5i. The clock is powered by a 3.0 volt Lithium battery soldered to the board. Battery drain for the clock is less than 0.4 uA. This battery will support the clock for about 10 years.
Hardware Configuration Note Some operating systems, including some versions of DOS, turn off the real-time clock alarm at boot time. If your OS does this, make sure that your application program enables the alarm function using this BIOS call. 2.15 UTILITY CONNECTOR (J16) Seven functions appear on the 16-pin connector at J16.
Little Board/P5i Technical Manual Table 2–36 Utility Connector (J16) Pin Signal Name Function 1 -12V power Connect external -12V supply here for distribution to expansion cards needing this voltage. 2 Ground Ground return 3 -5V power Connect external -5V supply here for distribution to expansion cards needing this voltage.
Hardware Configuration 2.15.2 Speaker Connections The board supplies about 100 mW for a speaker on J16-7. Connect the other side of the speaker to ground (J16-8). A transistor amplifier buffers the speaker signal. Use a small general purpose 2 or 3 inch permanent magnet speaker with an 8 ohm voice coil. Refer to Chapter 3, Section 3.14 for an explanation of the PC speaker circuit architecture. 2.15.
Little Board/P5i Technical Manual PC/104-compatible expansion modules can be installed on the Little Board/P5i expansion bus. The buffered output signals to the expansion bus are standard TTL level signals. All inputs to the Little Board/P5i operate at TTL levels and present a typical CMOS load to the expansion bus.
Hardware Configuration You do not need to add a +12V supply to program Flash EPROMs installed in the byte-wide socket, or for the onboard Flash device that stores the ROM BIOS, video BIOS, and optional Ethernet boot PROM code. An onboard supply provides the programming voltage. This supply does not provide power to the expansion bus. Most Ampro expansion products provide onboard DC-to-DC converters to convert the +5V supply to other voltages they require.
Little Board/P5i Technical Manual Table 2–39 PC/104 Expansion Bus Connector, P1 (A1-A32) 2–50 Pin Signal Name Function In/Out A1 IOCHCK* bus NMI input IN A2 SD7 Data bit 7 I/O A3 SD6 Data bit 6 I/O A4 SD5 Data bit 5 I/O A5 SD4 Data bit 4 I/O A6 SD3 Data bit 3 I/O A7 SD2 Data bit 2 I/O A8 SD1 Data bit 1 I/O A9 SD0 Data bit 0 I/O A10 IOCHRDY Processor Ready Ctrl IN A11 AEN Address Enable I/O A12 SA19 Address bit 19 I/O A13 SA18 Address bit 18 I/O A14
Hardware Configuration Table 2–40 PC/104 Expansion Bus Connector, P1 (B1-B32) Pin Signal Name Function In/Out B1 GND Ground N/A B2 RESETDRV System reset signal OUT B3 +5V +5 Volt power N/A B4 IRQ9 Interrupt request 9 IN B5 -5V To J16-3 N/A B6 DRQ2 DMA request 2 IN B7 -12V To J16-1 N/A B8 ENDXFR* Zero wait state IN B9 +12V To J10-1 N/A B10 N/A Keyed pin N/A B11 SMEMW* Mem Write(lwr 1MB) I/O B12 SMEMR* Mem Read(lwr 1MB) I/O B13 IOW I/O Write I/O B14 I
Little Board/P5i Technical Manual Table 2–41 PC/104 Expansion Bus Connector, P2 (C0-C19) 2–52 Pin Signal Name Function In/Out C0 GND Ground N/A C1 SBHE Bus High Enable I/O C2 LA23 Address bit 23 I/O C3 LA22 Address bit 22 I/O C4 LA21 Address bit 21 I/O C5 LA20 Address bit 20 I/O C6 LA19 Address bit 19 I/O C7 LA18 Address bit 18 I/O C8 LA17 Address bit 17 I/O C9 MEMR* Memory Read I/O C10 MEMW* Memory Write I/O C11 SD8 Data Bit 8 I/O C12 SD9 Data Bit 9
Hardware Configuration Table 2–42 PC/104 Expansion Bus Connector, P2 (D0-D19) Pin Signal Name Function In/Out D0 GND Ground N/A D1 MEMCS16* 16-bit Mem Access IN D2 IOCS16* 16-bit I/O Access IN D3 IRQ10 Interrupt Request 10 IN D4 IRQ11 Interrupt Request 11 IN D5 IRQ12 Interrupt Request 12 IN D6 IRQ15 Interrupt Request 15 IN D7 IRQ14 Interrupt Request 14 IN D8 DACK0* DMA Acknowledge 0 OUT D9 DRQ0 DMA Request 0 IN D10 DACK5* DMA Acknowledge 5 OUT D11 DRQ5 DMA
Little Board/P5i Technical Manual Table 2–43 PC/104-Plus Expansion Bus Connector, P21 (A1-D30) 2–54 Pin A B C D 1 GND/5.0V KEY4 Reserved +5 AD00 2 VI/O (+5V) AD02 AD01 +5V 3 AD05 GND AD04 AD03 4 C/BE0* AD07 GND AD06 5 GND AD09 AD08 GND 6 AD11 VI/O (+5V) AD10 M66EN1 7 AD14 AD13 GND AD12 8 +3.3V C/BE1* AD15 +3.3V 9 SERR* GND SB0* PAR 10 GND PERR* +3.3V SDONE 11 STOP* +3.3V LOCK* GND 12 +3.3V TRDY* GND DEVSEL* 13 FRAME* GND IRDY* +3.
Hardware Configuration 2.16.4 PCI Bus (P21) Notes 1. Signal M66EN is grounded on the motherboard (Ground = 33MHz bus speed). 2. The shaded cells in the table denote unsupported signals. 3. The KEY pins are to guarantee proper module installation. Pin-A1 will be removed and the female side plugged for 5.0V I/O signals and Pin-D30 will be modified in the same manner for 3.3V I/O. Both pins will be removed for 3.3/5.0 operation. 2.16.
Little Board/P5i Technical Manual Table 2–45 DMA Channel Assignments 2–56 Channel Function 0 Available for 8-bit transfers 1 Available for 8-bit transfers (Multimode Parallel port) 2 Floppy controller 3 Available for 8-bit transfers 4 Cascade for channels 0-3 5 Available for 16-bit transfers 6 Available for 16-bit transfers 7 Available for 16-bit transfers
CHAPTER 3 SOFTWARE CONFIGURATION 3.1 INTRODUCTION This chapter provides the information you will need to software-configure your Little Board/P5. It describes how to configure onboard options using the SETUP function. It also provides technical details about each functional block of the board, from a software point-of-view. This chapter presumes you have some familiarity with DOS (PC-DOS, MS-DOS, or DR DOS). It does not attempt to describe the standard DOS and ROM BIOS functions.
Little Board/P5i Technical Manual Table 3–1 Functions on Each SETUP Page Page Menu Name 1 Main Menu 2 Standard CMOS SETUP 3 BIOS Features SETUP 4 Chipset Features SETUP 5 Power Management SETUP 6 PCI Configuration SETUP 3–2 Functions Select various SETUP screens Load or Save BIOS defaults Configure IDE auto detection Set date and time Enter IDE hard disk parameters Set type and number of floppy disks Set default video state Configure BIOS error handling Displays amount of installed DRAM memory Enab
Software Configuration 3.3 SETUP 1—MAIN MENU The first SETUP page contains a menu for accessing several SETUP screens, plus several additional parameters. Figure 3–1 shows SETUP page 1. Sections following the figure describe each option. CMOS SETUP UTILITY Ampro Computers, Inc.
Little Board/P5i Technical Manual 3.4 SETUP 2—STANDARD CMOS SETUP Use SETUP 2 to set the date and time, configure your hard and floppy disks, and report system memory. Figure 3–2 shows what can be configured on SETUP 2, and the sections that follow describe each parameter. STANDARD CMOS SETUP Ampro Computers, Inc.
Software Configuration 3.4.1 IDE Hard Disk Drives The ROM BIOS supports up to four hard disk drives connected to the IDE interface. IDE CD-ROM drives and other IDE-interfaced peripherals are configured by software or drivers supplied separately. Only hard disk drives are directly supported in the system’s ROM BIOS. Physical drives can have one or more logical partitions. You can install up to eight logical drives using drive partitions.
Little Board/P5i Technical Manual is generally already set up properly. When connecting four drives, jumper a master and a slave for each cable. Once you have set the system’s configuration memory, the IDE drive(s) can be formatted and otherwise prepared normally. Refer to your operating system and disk drive documentation for specific procedures and requirements. 3.4.2 Floppy Drives The ROM BIOS supports all of the popular DOS-compatible floppy disk formats.
Software Configuration 3.5 SETUP 3—BIOS FEATURES SETUP Use SETUP 3 to set a variety of BIOS feature options. Figure 3–3 shows what can be configured on SETUP 3, and the sections that follow describe each parameter. BIOS FEATURES SETUP Ampro Computers, Inc.
Little Board/P5i Technical Manual Swap Floppy Drive— If two floppy drives are connected to the system, drive A becomes drive B and vice-versa. Boot Up Floppy Seek—during POST, the BIOS performs a seek test to determine if the drive is 40 or 80 tracks (360K drives have 40 tracks, other drives have 80 tracks). Boot Up NumLock Status—sets the default state of the keyboard’s numeric keypad. On sets the keypad to numbers, Off sets the keypad to arrows.
Software Configuration Serial Console—enables or disables use of a serial console connected to a serial port. When used as a serial console, the serial port does not appear in the BIOS COM port table. This means that it will not be COM1, COM2, etc. Select the serial port and its BAUD rate, such as Serial 1@2400, Serial 2@9600, and so forth. Other communication parameters are fixed at 8-bit words, 1 start bit, 1 stop bit, and no parity. Default setup of the serial console port is Disabled.
Little Board/P5i Technical Manual 3.6 SETUP 4—CHIPSET FEATURES SETUP SETUP 4—Chipset Features SETUP controls internal chipset features and certain peripheral SETUP functions. Many of these items should never be changed by the OEM or end user, as they specify internal parameters that have been chosen to support the existing motherboard design. Change them only if directed to by Ampro technical support. Figure 3–4 shows what can be configured on SETUP 4.
Software Configuration • IDE PIO—these four selections let you set the PIO mode for devices attached to the IDE interface. Auto (default) lets the BIOS automatically determine what mode is appropriate for each device. Mode 1 through Mode 4 forces the BIOS to use the specified mode, and overrides the MODE setting on the Standard CMOS SETUP Screen, SETUP 2. • Onboard FDC Controller—enables or disables the onboard floppy disk controller.
Little Board/P5i Technical Manual The ROM BIOS assigns a logical designation (LPT1 or 2) to the parallel port, based on a scan at boot time. Changing the port’s designation with SETUP does not necessarily change it from LPT1 to LPT2. There must be an LPT1 elsewhere in the system for the onboard parallel port to become LPT2. For further information about using the parallel port, see “Multimode Parallel Port” on page 3–20. • Parallel Port Mode—set the parallel port mode, either Normal, EPP, ECP, or EPP/ECP.
Software Configuration 3.7 SETUP 5—POWER MANAGEMENT SETUP The Little Board/P5i CPU BIOS incorporates an Advanced Power Management BIOS (APM) compliant with Advanced Power Management (APM) BIOS Interface Specification Revision 1.1, created by Intel and Microsoft. SETUP 5—Power Management SETUP allows you to configure your system to most effectively save energy while operating at the speed and response level you want. Figure 3–5 shows what can be configured on SETUP 5.
Little Board/P5i Technical Manual PM Control by APM—when enabled, an Advanced Power Management (APM) device will be activated to enhance the Max. Power Saving mode and stop the CPU internal clock. If Max. Power Saving mode is not enabled, this parameter defaults to No. Video Off Option—sets the conditions under which the BIOS powers down the video. Selections include Always On (option disabled), Suspend = Off, Stby = Off. CPU Thermal Mgmt.—options are Disable, 70°C, and 85°C .
Software Configuration 3.8 SETUP 6—PCI CONFIGURATION SETUP The Little Board/P5i CPU BIOS incorporates automatic PCI IRQ configuration for peripherals. You can, however, override the automatic features and specify PCI IRQ settings with SETUP 6. Figure 3–6 shows what can be configured on SETUP 6. A description of each option is listed below. PCI CONFIGURATION SETUP Ampro Computers, Inc.
Little Board/P5i Technical Manual 3.9 OPERATION WITH DOS The Little Board/P5i supports IBM’s PC-DOS or Microsoft’s MS-DOS, Version 3.3 or later, or any version of Digital Research’s DR DOS as the disk operating system. Any differences between these similar operating systems are noted in the text where applicable. EMS Option—The Little Board/P5i can emulate the Lotus-Intel-Microsoft Expanded Memory Specification Version 4.0 (LIM EMS 4.
Software Configuration 3.10.2 Serial Console Features To use the serial console features, connect a serial console device to Serial 1 or Serial 2. Use SETUP 3 to enable the serial console feature. When enabled, the serial console is set up for: • 9600 baud • No parity • 8 bits • One stop bit To use an ASCII terminal as the console device for your system, set the serial baud rate, parity, data length, and stop bits of the terminal to match the serial console settings.
Little Board/P5i Technical Manual Right > or Ctrl-d Left < or Ctrl-s PgUp Ctrl-r PgDn Ctrl-c The function keys are simulated by entering two keystrokes, an “F” followed by the function key number. Thus, function key F3 is simulated with the literal “F3” typed on the keyboard. (Don’t type the quotes). F10 is simulated with “F0”. Note that these keystroke simulations are only valid during SETUP, not during normal operation.
Software Configuration 3.10.4 Interrupt Sharing Having four serial ports reveals a weakness in the standard PC architecture. Namely, if you require all four ports to use interrupts, you must determine how to deal with the interrupts for the third and fourth serial ports. Normally, Serial 3 attaches to IRQ4 and Serial 4 attaches to IRQ3, but, since interrupts are not normally a sharable resource, you could do this only if you enabled and disabled the conflicting interrupt lines, a less than ideal solution.
Little Board/P5i Technical Manual IN AL,DX ;read data in MOV DX,CS:Ser3 OUT DX,AL ;write data to other port Nin2: MOV AL,64H ;clear IRQ4 to enable new interrupt OUT INTR,AL MOV DX,CS:IFl1 IN AL,DX AND AL,1 ;see if data received JZIn1 Ninb1: MOV DX,CS:IFl3 IN AL,DX; AND AL,1 ;see if data received JZ In2 POP DX POP AX IRET ; ; *********INTERRUPT INITIALIZATION ROUTINE********* ; MOV DX,OFFSET SerInt MOV AL,0Ch ;set the vector for IRQ4 PUSH DS PUSH CS POP DS ; set the vector for INT13 using a DOS function cal
Software Configuration handshaking signals for increased throughput. Data flow is monitored by a watchdog timer (separate from the board’s watchdog timer) to ensure reliable transfers. Extended Capabilities Parallel Port (ECP)—Compliant with the IEEE-1284 Extended Capabilities Port Protocol and ISA Standard (Rev 1.09, January 7, 1993), developed by Microsoft. The ECP mode provides the highest level throughput for the parallel port.
Little Board/P5i Technical Manual can dynamically change the port between input and output modes by changing bit 5. A 1 in bit five sets the port to input only; a 0 sets it to output only. Here is a sample of code for dynamically changing the port direction after it is in Extended Mode.
Software Configuration Table 3–7 Parallel Port Register Bits Register Bit DATA (378h) (278h) 0 1 2 3 4 5 6 7 STATUS (379h) (279h) 0 1 2 3 4 5 6 7 CONTROL (37Ah) (27Ah) 0 1 2 3 4 5 6 7 Signal Name or Function In/Out Active High/Low J15 Pin DB25F Pin I/O I/O I/O I/O I/O I/O I/O I/O High High High High High High High High 3 5 7 9 11 13 15 17 2 3 4 5 6 7 8 9 TMOUT 0 0 -ERROR SLCT PE -ACK (IRQ) BUSY In ----In In In In In ------Low High High Low High ------4 25 23 19 21 ------15 13 12 10 11
Little Board/P5i Technical Manual Table 3–8 Standard and PS/2 Mode Register Bit Definitions (Cont.) Signal Name Full Name Description PE Paper end Reflects the status of the PE input. 1 indicates paper end. -ACK Acknowledge -BUSY Busy Reflects the complement of the BUSY input. 0 indicates a printer is busy. STROBE Strobe This bit is inverted and output to the -STROBE pin. AUTOFD Auto feed This bit is inverted and output to the -AUTOFD pin.
Software Configuration 3.12 ETHERNET LAN INTERFACE This section discusses the hardware and software considerations when setting up a network using the Ethernet LAN interface. 3.12.1 Network Terms The following are some of the terms used in this section: Trunk or network segment—The cable over which network stations communicate. A segment is usually made up of several cable lengths connected together. A segment is limited in its total length and the number of network stations it can support.
Little Board/P5i Technical Manual 3.12.3 AUI Installations This section discusses the guidelines for installations that use the AUI port for connection to an external transceiver device. You can connect the Little Board/P5i to a LAN through the standard Adapter Unit Interface (AUI) connection. The AUI connects to an external device such as a hub, concentrator, or MAU. The AUI enables you to connect your node to fiber optic, thick net cable, or other Ethernet media via an external transceiver.
Software Configuration 3.13 EXTERNAL VIDEO OVERLAY (PC VIDEO) The video controller supports external RGB video data to be input and merged with the internal VGA data stream through the External Video Overlay port (J6). This interface allows you to display “live” video. The controller supports two forms of video windowing: 1. Color key input 2.
Little Board/P5i Technical Manual The following simple assembly language routine illustrates how to control the watchdog timer using the Ampro ROM-BIOS function that has been provided for this purpose: ;---------------------------------------------------------; Watchdog timer control program ;---------------------------------------------------------MOV AH,0C3h ; Watchdog Timer BIOS function MOV AL,nn ; Use “00” to disable, “01” to enable ; timer.
Software Configuration 3.17 SYSTEM MEMORY MAP The Little Board/P5i architecture allows it to address up to 128M bytes of memory. Table 3–9 shows how this memory is used. The DRAM, the byte-wide sockets, and ROM BIOS occupy the first megabyte (starting at 00000h). You can install up to 128M bytes of DRAM onboard with 4M, 8M, 16M, 32M, and 64M byte 72-pin SIMMs. The BIOS automatically determines how much memory is in the system during POST.
Little Board/P5i Technical Manual 3.18 SYSTEM I/O MAP Table 3–10 lists the I/O port assignments used on the Little Board/P5i.
Software Configuration The I/O port functions and addresses (except for a few “Ampro reserved” addresses) shown in the table are all standard for PC compatibles from both a hardware and software perspective. Typically, the ROM BIOS provides all the services needed to use the onboard devices and devices connected to I/O ports. If you need to directly program the standard functions, refer to a programming reference for the PC/AT.
INDEX 10BaseT, 2–42 28-pin devices, in 32-pin sockets, 2–26 AAN-8702, 2–27 AAN-9003, 2–27 AAN-9403, Serial boot, 3–18 Active terminators, SCSI, 2–25 Analog video, 2–33 ANSI X3.
Little Board/P5i Technical Manual EGA/VGA, 3–6 EIDE interface, 1–3, 2–18 Embedded-PC System Enhancements, 1–6 EMS, 3–16 Environmental specifications, 1–10 Error Halt, 3–6 Ethernet ID, 3–26 Ethernet interface, 1–4, 1–9, 2–41, 3–9, 3–25 Expanded memory, 2–9 Expansion bus, 1–2, 2–47 Extended memory, 2–9 External battery, 2–47 External Video Overlay, 3–27 External Video Overlay Connector (J6), 2–40 Flash EPROMs, 2–30 Flat panel contrast, 2–38 Flat panel displays, 1–11 Flat panel shift clock jumper (W23), 2–36
Index PC/104 bus, 1–2 PC/104 bus connectors (P1, P2), 2–50 PC/104-Plus bus, 2–47 Performance, system, 2–28 Polarity, Vee supply, 2–37 Port, Serial, 2–10 Power Connector (J10), 2–6 Power fail write protect, 2–7 Power LED, 2–46 Power requirements, 2–6 Power supplies, switching, 2–7 Power, DC, 2–6 Powerfail NMI, 3–28 Powerfail options, 2–7 POWERGOOD signal, 2–45 Printer port, 2–13 Pushbutton reset, 2–47 Real-time clock, 2–7, 2–44 Regulatory testing, 1–5 Repeater, 3–25 Reset, 2–7 Reset, pushbutton, 2–47 RJ45
