Unit installation

Altera Corporation 297

Glossary

This glossary defines selected terms used in MAX+PLUS II documentation.

1 Choose Glossary (Help menu) to view the full MAX+PLUS II glossary on-line.

ACF see Assignment & Configuration

File.

active-high node A node that is activated

when it is assigned a value of one (1 in

AHDL and Verilog HDL or '1' in VHDL)

or VCC (e.g., ena, clk).

active-low node A node that is activated

when it is assigned a value of zero (0 in

AHDL and Verilog HDL or '0' in VHDL)

or GND (e.g., clrn, prn, oen). In AHDL

design files, an active-low node should be

assigned a default value of VCC with the

Defaults Statement.

ADF see Altera Design File.

AHDL see Altera Hardware Description

Language.

Altera Design File (.adf) An ASCII-format

file (with the extension .adf) for Boolean

equation entry, used with AlteraÕs

A+PLUS software. ADFs use a netlist

format and Boolean equations to describe a

design. The MAX+PLUS II Compiler

automatically translates an ADF into a

Compiler Netlist File (.cnf) during project

compilation.

An ADF is also generated when a State

Machine File (.smf) is compiled.

Altera Hardware Description Language

(AHDL) A high-level, modular language

that is completely integrated into the

MAX+PLUS II system. You can create

AHDL Text Design Files (.tdf) with the

81_GSBOOK.fm5 Page 297 Tuesday, October 14, 1997 4:04 PM