Unit installation

MAX+PLUS II Getting Started
300 Altera Corporation
MAX+PLUS II applications and commands
are background processes:
■ Compiler
■ Programmer
■ Simulator
■ Timing Analyzer
■ ACF Reader
■ Waveform Editor Import Vector File
command (File menu)
■ MAX+PLUS II Project Archive
command (File menu)
balloon text Pop-up text in the Floorplan
Editor that provides information on an
item under the mouse pointer, such as a
pin, I/O cell, logic cell, embedded cell, or
an assignment bin. Information is
displayed in the following formats:
<node name> @ <cell number>
<pin name> @ <pin number> (<pin function>
(<dedicated pin name>))
where the <pin name> or <cell name> is
replaced by the text <none> if no item is
assigned to a particular resource. If
multiple functions are assigned to the
resource, the first two names are listed,
followed by the text etc. if there are
additional names. In a last compilation
floorplan, the text (unrouted) appears
after the pin or node name for items that
did not fit successfully.
batch mode The simulation mode in
which Simulator commands are executed
from a Command File (.cmd) rather than
from on-screen options or menu
commands.
binary The base 2 number system (radix).
Binary digits are 0 and 1.
Boolean logic Logic that obeys the
theorems of Boolean algebra (George
Boole, ÒThe Laws of Thought,Ó 1854). The
Boolean portion of a design is the portion
which can be implemented in the AND-OR
matrix of a device.
branches The extensions of the hierarchy
tree that represent the different levels of the
hierarchy. A branch consists of a design
filename, a file icon, and any ancillary file
icons. The intersections of branches are
indicated by Ò+Ó and Ò-Ó branch buttons.
Connection arrows lead from higher-level
branches to lower-level branches.
breakpoint A user-defined set of
conditions that will interrupt simulation
when fulfilled.
buried node A combinatorial or registered
signal that does not drive an output pin.
buried register A register in an Altera
device that does not drive its output to a
pin. A buried register can be located on an
I/O pin or on a logic cell that has no output
to a pin. A buried register can be used to
implement internal logic.
bus A thick line in a Graphic Editor file
that represents multiple nodes. A bus
carries multiple signals between
components of a design, and can represent
from 2 to 256 nodes (i.e., bits).
In AHDL and Waveform Editor files, a
group is synonymous with a bus.
In VHDL, a bus is a guarded signal that
may have its drivers, i.e., signal sources,
turned off. In VHDL, a bus is called an
array, and is not limited to 256 symbolic
names. An example of an array type is
STD_LOGIC_VECTOR. See Section 3.2.1:
81_GSBOOK.fm5 Page 300 Tuesday, October 14, 1997 4:04 PM