Unit installation

Glossary
Altera Corporation 317
Glossary
Glossary
location A generic term that refers to an
assignable physical resource in the interior
of an Altera device.
You can assign a logic function to one of the
following locations:
■ An individual logic cell
■ An individual I/O cell
■ An individual embedded cell
■ A logic array block (LAB), embedded
array block (EAB), row, or column
When you assign a logic function to a
general location such as a LAB, EAB, row,
or column, the Compiler can choose the
best logic cell or embedded cell within the
LAB, row, or column to use to implement
the logic.
Log File (.log) An ASCII text file (with the
extension .log) created by the
MAX+PLUS II Simulator. The Log File
records all commands, buttons, and on-
screen options that are used during an
interactive simulation session.
logic function or Design Entity A primitive,
megafunction, macrofunction, or state
machine, which may be represented as
either a name or a symbol in a design file.
Logic Array Block (LAB) A physically
grouped set of logic resources in an Altera
device. An LAB consists of a logic cell array
and, in some device families, an expander
product term array. Any signal that is
available to any one logic cell in the LAB is
available to the entire LAB.
In Classic devices, the logic in the LAB
shares a global Clock signal. The LAB is fed
by a global bus and a dedicated input bus.
(In an EP1810 device, an LAB is
synonymous with a quadrant.) In
MAX 5000 and MAX 7000 devices, the LAB
is fed by a Programmable Interconnect
Array (PIA) and a dedicated input bus. In
FLEX 6000, FLEX 8000, MAX 9000, and
FLEX 10K devices, the LAB is fed by row
FastTrack Interconnect paths and a
dedicated input bus.
logic cell (LC) The generic term for a basic
building block of an Altera device. In
Classic, MAX 5000, MAX 7000, and
MAX 9000 devices, a logic cell (also called a
macrocell) consists of two parts:
combinatorial logic and a configurable
register. The combinatorial logic allows a
wide variety of logic functions. In
FLEX 6000, FLEX 8000, and FLEX 10K
devices, a logic cell (also called a logic
element) consists of a look-up table (LUT),
i.e., a function generator that quickly
computes any function of four variables,
and a programmable register to support
sequential functions.
The register can be programmed as a flow-
through latch; as a D, T, JK, or SR flipflop;
or bypassed entirely for pure
combinatorial logic. The register can feed
other logic cells or feed back to the logic cell
itself. Some logic cells feed output or
bidirectional I/O pins on the device.
You can assign a logic function to a specific
logic cell. You can also assign a logic
function to a logic array block (LAB), a row,
or a column to ensure that the function is
implemented in a logic cell in a particular
LAB, row, or column.
In FLEX 10K, FLEX 8000, FLEX 6000, and
MAX 9000 devices, logic cells have
ÒnumbersÓ of the format
LC<number>_<LAB name>, where
<number> ranges from 1 to 8 and <LAB
name> consists of the row letter and
81_GSBOOK.fm5 Page 317 Tuesday, October 14, 1997 4:04 PM