Unit installation

Glossary
Altera Corporation 323
Glossary
Glossary
embedded processor-type programming
environments.
multi-level synthesis Logic synthesis that
takes advantage of all available logic
options, including all options listed in the
Define Synthesis Style and Advanced
Options dialog boxes (Assign menu). This
type of logic synthesis can handle projects
with extremely complex logic, without
requiring user intervention to achieve a fit.
Multi-level synthesis can be selected with
the Global Project Logic Synthesis dialog
box (Assign menu). This type of synthesis
is available only for the MAX 5000,
MAX 7000, MAX 9000, FLEX 6000,
FLEX 8000, and FLEX 10K device families;
it is the only type of synthesis available for
FLEX 6000, FLEX 8000, and FLEX 10K
projects.
N
name characters The characters A to Z, a to
z, 0 to 9, slash (/), dash (-), and underscore
(_) are legal for MAX+PLUS II breakpoint,
chip, clique, file, group (bus), node,
parameter, pin, pinstub, probe, logic
synthesis style, and quoted and unquoted
symbolic names, with the exceptions listed
below. Case is significant only in Verilog
HDL files.
Item: Name Character
Exception:
filename No slash (/) is permitted.
Case is significant on UNIX
workstations.
single-range
group (bus)
name
No slash (/) is permitted;
the bus identifier cannot
end with a digit. The name
is followed by a range of
numbers or arithmetic
expressions in brackets.
The start and end of the
range are separated by two
periods. For example,
group a[3..1] consists of
the nodes a3, a2, and a1.
In Graphic Editor files
only, sequential bus names
can also include a series of
single-range bus names.
For example,
a[8..0],d[6..4].
dual-range
group (bus)
name
Same as single-range
group names, with two
ranges of numbers or
arithmetic expressions in
brackets. For example,
a[6..3][4..0].
sequential
group (bus)
name
The name consists of a
series of comma-separated
node names enclosed in
parentheses. For example,
group (a, b, c) consists
of the nodes a, b, and c. In
Graphic Editor files,
parentheses are not used.
unquoted
symbolic
name (AHDL)
No dash (-) is permitted.
Names cannot consist
entirely of digits. AHDL
keywords cannot be used.
Verilog HDL
identifiers
No slash (/) or dash (-) is
permitted. Names cannot
begin with a digit. Case is
significant. Verilog HDL
keywords cannot be used.
Item: Name Character
Exception:
81_GSBOOK.fm5 Page 323 Tuesday, October 14, 1997 4:04 PM