Unit installation

MAX+PLUS II Getting Started
330 Altera Corporation
Programmer Log File (.plf) An ASCII file
(with the extension .plf) generated by the
Programmer that records programming
session commands and messages.
Programmer Object File (.pof) A binary file
(with the extension .pof) generated by the
CompilerÕs Assembler module. This file
contains the data used by the
MAX+PLUS II Programmer to program an
Altera device. The MAX+PLUS II
Programmer can optionally save
functional test vectors in a POF.
programming file A file containing data
for programming Altera devices. Both the
MAX+PLUS II Compiler and Programmer
can generate programming files. The
following programming file formats are
available in MAX+PLUS II:
■ FLEX Chain File (.fcf)
■ Hexadecimal (Intel-Format) File (.hex)
■ Jam File (.jam)
■ JEDEC File (.jed)
■ JTAG Chain File (.jcf)
■ Programmer Object File (.pof)
■ Raw Binary File (.rbf)
■ Serial Bitstream File (.sbf)
■ Serial Vector Format File (.svf)
■ SRAM Object File (.sof)
■ Tabular Text File (.ttf)
POFs, SOFs, JEDEC Files, JCFs, and FCFs
are used to program or configure devices
with the MAX+PLUS II Programmer; test
vectors for functional testing can be saved
in POFs and JEDEC Files. All other file
formats are used to program or configure
devices in other environments.
JEDEC Files generated by A+PLUS and
PLDshell Plus software can also be used to
program Classic devices. The Programmer
can save data read from an examined
device in POF or JEDEC File format.
project A project consists of all files that
are associated with a particular design,
including all subdesign files and related
ancillary files created by the user or by
MAX+PLUS II software. The project name
is the same as the name of the top-level
design file in the project, without the
filename extension.
MAX+PLUS II performs compilation,
simulation, timing analysis, and
programming on only one project at a time.
propagation delay The time required for
any signal transition to travel between pins
and/or nodes in a device.
R
radix A number base. Group logic level
and numerical values are entered and
displayed in binary, decimal, hexadecimal,
or octal radix in MAX+PLUS II.
RAM Random-access memory. You can
implement RAM with Embedded Array
Blocks (EABs) in the FLEX 10K device
family, and with arrays of flipflops or
latches in other device families.
range A sequence of numbers or
arithmetic expressions that define the
width of a group (bus). A range is enclosed
in brackets; the most significant bit (MSB)
of the range is shown first; the least
significant bit (LSB) is shown last. The start
and end of the range are separated by two
periods in the Graphic Editor and in
AHDL, and by a colon in Verilog HDL.
81_GSBOOK.fm5 Page 330 Tuesday, October 14, 1997 4:04 PM