Datasheet

AD1938 Data Sheet
Rev. E | Page 22 of 32
05582-024
DBCLK
DLRCLK
DSDATAx
LEFT-JUSTIFIED
MODE
DSDATAx
RIGHT-JUSTIFIED
MODE
DSDATAx
I
2
S-JUSTIFIED
MODE
t
DLH
t
DBH
t
DBL
t
DLS
t
DBP
t
DDS
MSB
MSB
MSB LSB
MSB–1
t
DDH
t
DDS
t
DDH
t
DDS
t
DDH
t
DDH
t
DDS
Figure 24. DAC Serial Timing
05582-025
ABCLK
ALRCLK
ASDATAx
LEFT-JUSTIFIED
MODE
ASDATAx
RIGHT-JUSTIFIED
MODE
ASDATAx
I
2
S-JUSTIFIED
MODE
t
ABH
LSB
MSB
MSB
MSB
MSB–1
t
ABL
t
ALS
t
ABDD
t
ABDD
t
ABDD
t
ALH
Figure 25. ADC Serial Timing