Datasheet

Data Sheet AD1939
Rev. E | Page 21 of 32
ALRCLK
ABCLK
4 ADC CHANNELS OF
SECOND IC IN THE CHAIN
4 ADC CHANNELS OF
FIRST IC IN THE CHAIN
ADC L1 ADC R1 ADC L2 ADC R2 ADC L1 ADC R1 ADC L2 ADC R2
ASDATA1 (TDM_OUT
OF THE SECOND AD1939
IN THE CHAIN)
ADC L1 ADC R1 ADC L2 ADC R2
ASDATA2 (TDM_IN
OF THE SECOND AD1939
IN THE CHAIN)
32 BITS
MSB
DSP
SECOND
AD1939
FIRST
AD1939
06071-057
Figure 22. ADC TDM Daisy-Chain Mode (512 f
S
ABCLK, Two-AD1939 Daisy Chain)
LRCLK
BCLK
SDAT
A
LRCLK
BCLK
SDAT
A
LRCLK
BCLK
SDAT
A
LSB LSB
LSB
LSB
LSB LSB
LEFT CHANNEL RIGHT CHANNEL
RIGHT CHANNEL
LEFT CHANNEL
LEFT CHANNEL RIGHT CHANNEL
MSB MSB
MSB
MSB
MSB MSB
RIGHT-JUSTIFIED MODE—SELECT NUMBER OF BITS PER CHANNEL
DSP MODE—16 BITS TO 24 BITS PER CHANNEL
I
2
S-JUSTIFIED MODE—16 BITS TO 24 BITS PER CHANNEL
LEFT-JUSTIFIED MODE—16 BITS TO 24 BITS PER CHANNEL
LRCLK
BCLK
SDAT
A
LSB LSB
NOTES
1. DSP MODE DOES NOT IDENTIFY CHANNEL.
2. LRCLK NORMALLY OPERATES AT
f
S
EXCEPT FOR DSP MODE, WHICH IS 2 × f
S
.
3. BCLK FREQUENCY IS NORMALLY 64 × LRCLK BUT MAY BE OPERATED IN BURST MODE.
MSB MSB
1/
f
S
06071-013
Figure 23. Stereo Serial Modes