Datasheet

AD1974 Data Sheet
Rev. D | Page 16 of 24
06614-014
AUXBCLK
AUXRCLK
AUXDATA
LEFT JUSTIFIED
MODE
AUXDATA
RIGHT JUSTIFIED
MODE
AUXDATA
I
2
S JUSTIFIED
MODE
t
XDH
t
XDH
t
XDH
t
XDS
t
XDS
t
XDH
t
XDS
t
XLH
t
XDS
t
XLS
t
XBL
t
XBH
MSB
LSB
MSB
MSB–1MSB
Figure 12. Auxiliary Serial Timing
ABCLK
ALRCLK
ASDATA
LEFT JUSTIFIED
MODE
ASDATA
RIGHT JUSTIFIED
MODE
ASDATA
I
2
S JUSTIFIED
MODE
t
ABH
LSB
MSB
MSB
MSB
MSB–1
t
ABL
t
ALS
t
ABDD
t
ABDD
t
ABDD
t
ALH
0
6614-015
Figure 13. ADC Serial Timing
Table 13. Pin Function Changes in TDM and AUX Modes (Replication of Table 12)
Pin Name Stereo Mode TDM Mode AUX Mode
ASDATA1 ADC1 data output ADC TDM data output ADCTDM data output
ASDATA2 ADC2 data output ADC TDM data input Not used (float)
AUXDATA1 Not used (ground) Not used (ground) AUXDATA in 1 (from external ADC1)
AUXDATA2 Not used (ground) Not used (ground) AUXDATA in 2 (from external ADC2)
ALRCLK ADC LRCLK input/output ADC TDM Frame Sync input/output ADCTDM frame sync input/output
ABCLK ADC BCLK input/output ADC TDM BCLK input/output ADCTDM BCLK input/output
AUXLRCLK Not used (ground) Not used (ground) AUXLRCLK input/output
AUXBCLK Not used (ground) Not used (ground) AUXBCLK input/output