Datasheet

Data Sheet AD1974
Rev. D | Page 5 of 24
POWER SUPPLY SPECIFICATIONS
Table 5.
Parameter Conditions/Comments Min Typ Max Unit
SUPPLIES
Voltage
DVDD 3.0 3.3 3.6 V
AVDD 3.0 3.3 3.6 V
Digital Current MCLK = 256 f
S
Normal Operation f
S
= 48 kHz 56 mA
f
S
= 96 kHz 65 mA
f
S
= 192 kHz 95 mA
Power-Down f
S
= 48 kHz to 192 kHz 2.0 mA
Analog Current
Normal Operation 74 mA
Power-Down 23 mA
DISSIPATION
Operation MCLK = 256 f
S
, 48 kHz
All Supplies
429
mW
Digital Supply 185 mW
Analog Supply 244 mW
Power-Down, All Supplies 83 mW
POWER SUPPLY REJECTION RATIO
Signal at Analog Supply Pins 1 kHz, 200 mV p-p 50 dB
20 kHz, 200 mV p-p 50 dB
DIGITAL FILTERS
Table 6.
Parameter Mode Factor Min Typ Max Unit
ADC DECIMATION FILTER All modes @ 48 kHz
Pass Band 0.4375 f
S
21 kHz
Pass-Band Ripple ±0.015 dB
Transition Band 0.5 f
S
24 kHz
Stop Band 0.5625 f
S
27 kHz
Stop-Band Attenuation 79 dB
Group Delay 22.9844 f
S
479 µs
TIMING SPECIFICATIONS
−40°C < T
C
< +125°C, DVDD = 3.3 V ± 10%.
Table 7.
Parameter Condition Comments Min Max Unit
INPUT MASTER CLOCK (MCLK)
AND RESET
t
MH
MCLK duty cycle ADC clock source = PLL clock @ 256 f
S
, 384 f
S
, 512 f
S
, 768 f
S
40 60 %
t
MH
ADC clock source = direct MCLK @ 512 f
S
(bypass
on-chip PLL)
40 60 %
f
MCLK
MCLK frequency
PLL mode, 256 f
S
reference
6.9
13.8
MHz
f
MCLK
Direct 512 f
S
mode 27.6 MHz
t
PDR
Low 15 ns
t
PDRR
Recovery Reset to active output 4096 t
MCLK