Datasheet

AD2S1205
Rev. A | Page 15 of 20
t
11
t
SCLK
t
10
t
9
t
8
06339-008
SCLK
SO
MSB MSB – 1 LSB RDVEL DOS LOT PAR
RD
t
3
t
6
t
7
f
CLKIN
CLKIN
SO
VELOCITYPOSITION
t
2
S
AMPLE
CS
RD
RDVEL
t
1
t
1
t
3
t
5
t
4
t
5
t
4
t
7
t
6
Figure 8. Serial Port Read Timing
Table 7. Serial Port Timing
1
Parameter Description Min Typ Max Unit
t
8
MSB read time RD/CS to SCLK
15 t
SCLK
ns
t
9
SO enable time RD
/CS to DB valid
30 ns
t
10
Data access time, SCLK to DB valid 30 ns
t
11
Bus relinquish time RD
/CS to SO high-Z
18 ns
t
SCLK
Serial clock period (25 MHz maximum) 40 ns
1
t
1
to t
7
are as defined in Table 6.