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System Management IC with Factory Programmed

Quad Voltage Monitoring and Supervisory Functions

AD5100

Rev. A

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FEATURES

Qualified for automotive applications

2 device-enabling outputs with 6 factory programmed

monitoring inputs (see Table 1)

Two 30 V monitoring inputs with shutdown control of

external devices

Factory programmed overvoltage, undervoltage, turn-on

and turn-off thresholds, and shutdown timings

Shutdown warning with fault detection

Reset control of external devices

5 V and 7.96 V monitoring inputs with reset control of

external devices

Factory programmed reset thresholds and hold time

eMOST-compatible inputs

Diagnostic application using V

2MON

and V

4MON

Two supervisory functions

Watchdog reset controller with timeout and selectable

floating input

Manual reset control for external devices

Digital interface and programmability

C-compatible interface

OTP can be overwritten for dynamic adjustments

Power-up by edge triggered signal

Power-down over I

C bus

Operating range

Supply voltage: 6.0 V to 30 V

Temperature range: −40°C to +125°C

Shutdown current: 5 μA max

Operating current: 2 mA max

High voltage input antimigration shielding pinouts

APPLICATIONS

Automotive systems

Network equipment

Computers, controllers, and embedded systems

GENERAL DESCRIPTION

The AD5100 is a factory programmed system management

IC that combines four channels of voltage monitoring and

watchdog supervision. The AD5100 can be used to shut down

external supplies, reset processors, or disable any other system

electronics when the system malfunctions. The AD5100 can

also be used to protect systems from improper device power-up

sequencing. The AD5100 is a robust watchdog reset controller,

and can monitor two 30 V inputs with shutdown and reset

controls, one 2.3 V to 5.0 V input, and one 1.6 V to 7.96 V

input. Most monitoring input thresholds and timing settings

have a range of settings which are factory programmed by

Analog Devices, Inc. in the one-time programmable EPROM

(OTP) memory, or can be programmed on-the-fly over the

serial interface.

The AD5100 is versatile for system monitoring applications

where critical microprocessor, DSP, and embedded systems

operate under harsh conditions, such as automotive, industrial,

or communications network environments.

The AD5100 is available in a compact 16-lead QSOP package

and can operate in an extended automotive temperature range

from −40°C to +125°C.

Analog Devices provides non-OTP programmed AD5100

parts for use in evaluating the desired threshold and delay

settings. Only factory programmed AD5100 parts are shipped

in production quantities. Contact Analog Devices directly to

inquire about factory programmed models.

Table 1. AD5100 General Input and Output Information

Input

Monitoring

Range

Shutdown

Control

Reset

Control

Fault

Detection

1MON

6 V to 28.29 V Yes Yes Yes

2MON

3 V to 24.75 V Yes Yes Yes

3MON

2.32 V to 4.97 V No Yes Yes

4MON

1.67 V to 7.96 V No Yes Yes

WDI 0 V to 5 V Yes Yes No

0 V to 5 V No Yes No

With programmable threshold and programmable delay.

Summary of content (36 pages)

PAGE 1
System Management IC with Factory Programmed Quad Voltage Monitoring and Supervisory Functions AD5100 FEATURES GENERAL DESCRIPTION Qualified for automotive applications 2 device-enabling outputs with 6 factory programmed monitoring inputs (see Table 1) Two 30 V monitoring inputs with shutdown control of external devices Factory programmed overvoltage, undervoltage, turn-on and turn-off thresholds, and shutdown timings Shutdown warning with fault detection Reset control of external devices 5 V and 7.
PAGE 2
AD5100 TABLE OF CONTENTS Features .............................................................................................. 1 Shutdown Output, SHDN ......................................................... 19 Applications ....................................................................................... 1 Reset Output, RESET ................................................................. 19 General Description .........................................................................
PAGE 3
AD5100 FUNCTIONAL BLOCK DIAGRAM AD5100 OV/UV V2MON (3V TO 30V) 640kΩ V3MON (2.5V TO 5V) 130kΩ V4MON (0.9V TO 30V) SHUTDOWN CONTROLLER 55kΩ ON/OFF RESET GENERATOR V1MON (6V TO 30V) 665kΩ SHDN SHDNWARN RESET V4OUT MR WDI WDI DETECTION AND RESET GENERATOR VOTP SDA AD0 OTP FUSE ARRAY I2C CONTROLLER REGISTER MAP FD REGISTER FAULT DETECTION Figure 1. Rev.
PAGE 4
AD5100 SPECIFICATIONS ELECTRICAL SPECIFICATIONS 6 V ≤ V1MON ≤ 30 V and 3 V ≤ V2MON ≤ 30 V, −40°C ≤ TA ≤ +125°C, unless otherwise noted. Table 2.
PAGE 5
AD5100 Parameter LOW VOLTAGE MONITORING INPUTS V3MON, V4MON V3MON Voltage Range Input Resistance V3MON Threshold Tolerance (See Figure 10 and Table 6) V3MON Hysteresis V4MON Voltage Range 4 Input Resistance V4MON Threshold Tolerance (See Figure 12 and Table 6) V4MON Hysteresis RESET RESET Hold Time Tolerance (See Figure 10, Figure 12, and Table 8) V3MON/V4MON-to-RESET Delay RESET Output Voltage High Symbol V3MON RIN_V3MON ΔV3MON V3_HYSTERESIS V4MON RIN_V4MON ΔV4MON ΔtRS_HOLD tRS_DELAY VOH VOL RESE
PAGE 6
AD5100 Parameter MR Pull-Up Resistance (Internal to V3MON) RESET Hold Time Tolerance (see Figure 12 and Table 8) SERIAL INTERFACES Input Logic High (SCL, SDA) 6 Input Logic Low (SCL, SDA) Output Logic High (SDA) Output Logic Low (SDA) Input Current Input Capacitance POWER SUPPLY Supply Voltage Range Sleep Mode Supply Current Active Mode Supply Current Device Power-On Threshold Device Power-Up V2MON, Minimum Pulse Width Device Power-Down Delay Symbol Conditions ΔtRS_HOLD TA = 25°C; does not apply to Cod
PAGE 7
AD5100 TIMING SPECIFICATIONS Table 3.
PAGE 8
AD5100 ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4.
PAGE 9
AD5100 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS V1MON 1 16 V2MON GND 2 15 GND/NC VOTP 3 14 V4MON AD5100 V3MON 4 AD0 TOP VIEW MR 5 (Not to Scale) 12 SHDN 13 11 SHDNWARN 10 V4OUT SDA 8 9 RESET NC = NO CONNECT 05692-003 WDI 6 SCL 7 Figure 3. Pin Configuration Table 5. AD5100 Pin Function Descriptions Mnemonic V1MON 2 3 4 5 6 7 GND VOTP V3MON MR WDI SCL 8 SDA 9 10 11 12 RESET V4OUT SHDNWARN SHDN 13 14 15 16 AD0 V4MON GND/NC V2MON Description High Voltage Monitoring Input.
PAGE 10
AD5100 ONE-TIME PROGRAMMABLE (OTP) OPTIONS All values are typical ratings; see Table 2 for tolerances. Table 6. Available Programmable Thresholds at TA = 25°C V1MON OV Threshold 1 7.92 V 9.00 V 9.90 V 11.00 V 12.00 V 13.20 V 14.14 V 15.23 V 15.84 V 17.22 V 18.00 V 3 18.86 V 19.80 V 22.00 V 24.75 V 28.29 V V1MON UV Threshold 6.00 V 6.49 V 6.95 V 7.47 V 7.92 V 8.43 V3 9.00 V 9.43 V 9.90 V 10.42 V 11.00 V 11.65 V 12.00 V 12.38 V 13.20 V 13.66 V V2MON Off Threshold 2 3.00 V 3.5 V 4.00 V 4.77 V 6.00 V 6.
PAGE 11
AD5100 Table 8. Available Programmable Hold Time and Delay t1SD_HOLD 0.07 ms 20 ms 40 ms 60 ms 80 ms 100 ms 150 ms 200 ms1 1 t1SD_DELAY 0.07 ms 50 ms 100 ms 200 ms 400 ms 800 ms 1000 ms 1200 ms1 t2SD_HOLD 0.07 ms 10 ms1 20 ms 30 ms 40 ms 50 ms 100 ms 200 ms t2SD_DELAY 0.07 ms 50 ms 100 ms1 200 ms 400 ms 800 ms 1000 ms 1200 ms tRS_HOLD 0.1 ms 1 ms 15 ms 30 ms 50 ms 100 ms 150 ms 200 ms1 tWD 100 ms 250 ms 500 ms 750 ms 1000 ms 1250 ms 1500 ms1 2000 ms AD5100-0 default settings.
PAGE 12
AD5100 THEORY OF OPERATION shutdown signal, SHDN and reset signal, RESET, while the two low voltage monitoring inputs control the reset signal, RESET. SHDN and RESET are both disabling signals for external devices. The differences between these two outputs are in output level and driving capabilities, as described in the Outputs section. The WDI (watchdog) and MR (manual reset) inputs also control the RESET output, for use with an external digital processor.
PAGE 13
AD5100 MONITORING INPUTS V1MON V1MON is a high voltage monitoring input that controls the SHDN and RESET functions of the external devices. In addition, it provides a shutdown warning to the system. V1MON monitors inputs from 6 V to 30 V. The V1MON pin is monitored by two comparators, one for overvoltage and one for undervoltage detection. Both are designed with 1.5% hysteresis.
PAGE 14
AD5100 tGLITCH V1MON_OV* V1MON V1MON_UV* tGLITCH V2MON_ON* V2MON V2MON_OFF* tMIN# t1SD_DELAY* t2SD_HOLD* t1SD_HOLD* t1SD_DELAY* t2SD_HOLD* t1SD_HOLD* t2SD_DELAY* t2SD_DELAY* SHDN AND RESET tFD_DELAY tFD_DELAY tFD_DELAY tFD_DELAY NOTES 1. * = PROGRAMMABLE. 2. # = THE DURATION OF THE tMIN MUST BE SHORTER THAN tVREG_OFF_DELAY OR ELSE THE AD5100 WILL BE POWERED OFF. 05692-006 SHDNWARN Figure 7.
PAGE 15
AD5100 V3MON V2MON_OFF is ignored if V2MON_OFF is greater than V2MON_ON but V2MON_OFF cannot equal V2MON_ON. HYSTERESIS V3MON_UV UV COMPARATOR INACTIVE UV COMPARATOR INACTIVE 05692-010 The ranges of on and off thresholds are shown in Table 6 and the programming codes for the selected-thresholds are found in Table 7. The default on threshold is 7.47 V and off threshold is 6.95 V.
PAGE 16
AD5100 V4MON V4MON is a low voltage monitoring input that controls the RESET function of an external device or provides a comparator output, V4OUT. The V4MON pin is monitored by a comparator to detect an undervoltage condition. It is designed with 5% hysteresis. When the V4MON input drops below the programmed UV threshold, the comparator becomes active immediately, indicating that a UV condition has occurred.
PAGE 17
AD5100 Standard Watchdog Mode Advanced Watchdog Mode In the default standard watchdog mode, if WDI remains either high or low for longer than the timeout period, tWD, a RESET pulse is generated in an attempt to allow the system processor to reestablish the WDI signal. The RESET pulses continue indefinitely until a valid watchdog signal, a rising or falling edge signal at the WDI, is received. The internal watchdog timer clears whenever a reset is asserted.
PAGE 18
AD5100 Floating WDI Input MANUAL RESET INPUT If the WDI pin is floating, the watchdog function is disabled by default. However, floating watchdog can be enabled in the RESET configuration register such that a broken WDI connection or any unusual condition that makes WDI float triggers the reset. Manual reset (MR) is an active low input to the AD5100 and has an internal pull-up resistor to V3MON. If the input signal on the MR pin goes low, RESET is activated. MR can be driven from a CMOS logic signal.
PAGE 19
AD5100 OUTPUTS SHUTDOWN OUTPUT, SHDN The shutdown output, SHDN, is triggered by V1MON or V2MON over- or underthreshold values, or as the result of a failed watchdog input. SHDN can also be asserted low at any time by writing to certain registers on the AD5100.
PAGE 20
AD5100 The RESET signal is asserted and maintained except when it is triggered by the WDI, which is described in the Watchdog Input section. The RESET signal is released after the programmable hold time, tRS_HOLD. As shown in Figure 17, the RESET output is push-pull configured with the rail voltage of V3MON. V3MON voltage at V1MON is detected as overvoltage or undervoltage, or the voltage at V2MON falls below the threshold, SHDNWARN outputs a Logic 0.
PAGE 21
AD5100 POWER REQUIREMENTS INTERNAL POWER, VREG Rising Edge Triggered Wake-Up Mode The AD5100 internal power, VREG, is derived from V1MON and becomes active when V2MON reaches 2.2 V. V2MON is used to turn AD5100 on and off with a different behavior depending on the V2MON monitoring mode selection. If rising edge triggered wake-up V2MON mode is selected instead, the AD5100 does not turn off when V2MON returns to a logic low.
PAGE 22
AD5100 PROTECTION Load Dump Protection For automotive applications, proper external protections on the AD5100 are needed to ensure reliable operation. The V1MON is likely to be used for battery monitoring. The V2MON is likely to be used for ignition switch or other critical inputs. As a result, these inputs may need additional protections such as EMI, load dump, and ESD protections. In addition, battery input requires reverse battery protection and short-circuit fuse protection (see Figure 19).
PAGE 23
AD5100 AD5100 REGISTER MAP Table 11 outlines the AD5100 register map, used to configure and control all parameters and functions in the AD5100, and indicates whether registers are writable, readable, or permanently settable. All registers have the same address for read and write operations. Once evaluation is complete, the user should contact Analog Devices with their desired OTP memory default values.
PAGE 24
AD5100 Register Address 0x09 0x0A 0x0B Read/ Write R/W R/W R/W Permanently Settable Yes Register Name and Bit Description V2MON turn-on triggered SHDN hold (t2SD_HOLD) NonOTP Power-On Default 1 0x00 (10 ms) Yes Bit No. Description [2:0] Three bits used to program V2MON tON triggered SHDN hold time [7:3] Reserved V2MON turn-off triggered SHDN delay (t2SD_DELAY) 0x00 (100 ms) Yes Bit No.
PAGE 25
AD5100 Register Address 0x16 Read/ Write R/W Permanently Settable No 0x17 R/W No 0x18 R/W No 0x19 Readonly No Register Name and Bit Description Special function 1 Bit No. Description [0] Reserved [1] Reserved [2] 0: software assertion of SHDN pin is inactive 1: pulls SHDN pin low [3] 0: override of permanent settings inactive 1: override of permanent settings active [7:4] Reserved Special function 2 Bit No.
PAGE 26
AD5100 I2C SERIAL INTERFACE The 2-wire serial bus protocol operates as follows: 1. 2. 3. The master initiates data transfer by establishing a start condition, which occurs when SDA goes from high to low while SCL is high.
PAGE 27
AD5100 WRITING DATA TO AD5100 • When writing data to the AD5100, the user begins by writing an address byte followed by the R/W bit set to 0. The AD5100 acknowledges (if the correct address byte is used) by pulling the SDA line low during the ninth clock pulse. The user then follows with two data bytes. The first data byte is the address of the internal data register to be written to, which is stored in the address pointer register. The second byte is the data to be written to the internal data register.
PAGE 28
AD5100 TEMPORARY OVERRIDE OF DEFAULT SETTINGS Even with OTP-Programmed parts, it is possible to temporarily override the default values of any of the permanently programmable registers. To override a permanent setting in a particular register (when the lock bit is programmed), the following sequence should be used: 1. 2. Set Bit 3 = 1 in Register 0x16 (special function 1). Write the desired temporary data to the register of choice.
PAGE 29
AD5100 APPLICATIONS INFORMATION CAR BATTERY AND INFOTAINMENT SYSTEM SUPPLY MONITORING The AD5100 has two high voltage monitoring inputs with shutdown and reset controls over external devices. For example, the V1MON and V2MON can be used to monitor the signals from a car battery and an ignition key in an automobile, respectively (see Figure 24).
PAGE 30
– VMAIN B+ + Figure 24. Typical DSP in Car Infotainment Application Rev. A | Page 30 of 36 IN RESET DVDD R2 1.5MΩ R1 2MΩ I/O OUT CODEC I/O AD0 SDA SCL C3 0.1µF WDI R2 R3 V3MON MMBZ27VCL SMCJ17 MR D3 D4 SMCJ17 D1 R3 2.2Ω D2 R4 2.2Ω C3 10µF DAC C2 10µF VOTP IGNITION SWITCH P1 NDT2955 DSP/ MICROPROCESSOR VDD C2 0.1µF L1 DR331-7-103 SIGNAL 3.3V 1.8V F1 C1 0.
PAGE 31
AD5100 OV UV BATTERY < tGLITCH IGNITION VREG tVREG_ON_DELAY tVREG_OFF_DELAY UV SHUTDOWN MICROPROCESSOR FAILED SHUTDOWN V2MON OFF SHUTDOWN MICROPROCESSOR FAILED RESET HIGH-Z SHUTDOWN ENABLE RESET SHDN 5V 3.3V WDI RESET HIGH-Z SHUTDOWN ENABLE RESET +5V BROWNOUT RESET WDI RESET MR RESET WDI RESET Figure 25. Example of SHDN and RESET Responses of Circuit Shown in Figure 24 Rev.
PAGE 32
AD5100 BATTERY MONITORING WITH FAN CONTROL BATTERY STATE OF CHARGE INDICATOR AND SHUTDOWN EARLY WARNING MONITORING V4MON can be used with V4OUT in tandem to form a simple PWM control circuit. For example, as shown in Figure 26, when a temperature sensor output connects to the V4MON input, with the proper threshold level set, V4OUT outputs high whenever the temperature goes above the threshold. This turns on the FET switch, which activates the fan.
PAGE 33
AD5100 RISING EDGE TRIGGERED WAKE-UP MODE As indicated in Figure 29, the microprocessor can control its own power-down sequence using the rising edge triggered wake-up signal. The operator must select the rising edge triggered wake-up mode setting for the V2MON turn-off threshold value, as shown in Table 6, by setting Register 0x04[3:1] = 1001. When the rising edge wake-up signal is detected by V2MON, the AD5100 is powered up with the SHDN pin pulled high.
PAGE 34
AD5100 VI VO VREG BATTERY CAN WAKE UP PULSE(S) V2MON I/O SCL MICROPROCESSOR I/O SDA RS WDI I/O SD AD5100 RESET 05692-030 VDD SHDN V1MON Figure 29. Rising Edge Triggered Wake-Up Mode V2MON WDI RESET SCL SCL SDA SDA WRITE NOTES 1. 6V < V1MON < 30V. 2. SELECT V2MON_OFF = RISING EDGE TRIGGER/CAN WAKE UP MODE. Figure 30. Rising Edge Triggered Operation of Circuit Shown in Figure 29 Rev.
PAGE 35
AD5100 OUTLINE DIMENSIONS 0.197 (5.00) 0.193 (4.90) 0.189 (4.80) 16 9 1 0.158 (4.01) 0.154 (3.91) 0.150 (3.81) 8 0.010 (0.25) 0.006 (0.15) 0.069 (1.75) 0.053 (1.35) 0.065 (1.65) 0.049 (1.25) 0.010 (0.25) 0.004 (0.10) COPLANARITY 0.004 (0.10) 0.244 (6.20) 0.236 (5.99) 0.228 (5.79) 0.025 (0.64) BSC SEATING PLANE 0.012 (0.30) 0.008 (0.20) 8° 0° 0.050 (1.27) 0.016 (0.41) 0.020 (0.51) 0.010 (0.25) 0.041 (1.
PAGE 36
AD5100 NOTES I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2009–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05692-0-6/10(A) Rev.