Datasheet

AD5263
Rev. A | Page 22 of 28
Listing 1. Macro Model Net List for RDAC
RDAC CIRCUIT SIMULATION MODEL
.PARAM D=256, RDAC=20E3
*
.SUBCKT DPOT (A,W,B)
*
CA A 0 25E-12
RWA A W {(1-D/256)*RDAC+60}
CW W 0 55E-12
RWB W B {D/256*RDAC+60}
CB B 0 25E-12
*
.ENDS DPOT
The internal parasitic capacitances and the external capacitive
loads dominate the ac characteristics of the RDACs. Configured
as a potentiometer divider, the –3 dB bandwidth of the AD5263
(20 kΩ resistor) measures 300 kHz at half scale.
Figure 22
provides the large signal BODE plot characteristics of the
three available resistor versions: 20 kΩ, 50 kΩ, and 200 kΩ. A
parasitic simulation model is shown in
Figure 56. The following
code provides a macro model net list for the 20 kΩ RDAC.
03142-069
20kΩ
C
A
W
2
5p
F
RDAC
AB
C
B
C
W
25pF
55pF
Figure 56. RDAC Circuit Simulation Model for RDAC = 20 k
Ω