Datasheet

Data Sheet AD534
Rev. D | Page 13 of 20
(X
1
– X
2
)(Y
1
– Y
2
), so that the circuit can exhibit a maximum
gain of 10. This connection results in a reduction of bandwidth
to about 80 kHz without the peaking capacitor C
F
= 200 pF. In
addition, the output offset voltage is increased by a factor of 10
making external adjustments necessary in some applications.
Adjustment is made by connecting a 4.7 MΩ resistor between
Z
1
and the slider of a potentiometer connected across the
supplies to provide ±300 mV of trim range at the output.
09675-008
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
90kΩ
10kΩ
–15V
X INPUT
±10V FS
±12V P
K
Y INPUT
±10V FS
±12V P
K
OPTIONAL PEAKING
CAPACITOR C
F
= 200pF
OUTPUT, ±12V PK =
(X
1
– X
2
) (Y
1
– Y
2
)
(SCALE = 1V)
Figure 16. Connections for Scale Factor of Unity
Feedback attenuation also retains the capability for adding a
signal to the output. Signals can be applied to the high impedance
Z
2
terminal where they are amplified by +10 or to the common
ground connection where they are amplified by +1. Input signals
can also be applied to the lower end of the 10 kΩ resistor, giving
a gain of −9. Other values of feedback ratio, up to ×100, can be
used to combine multiplication with gain.
Occasionally, it may be desirable to convert the output to a
current into a load of unspecified impedance or dc level. For
example, the function of multiplication is sometimes followed
by integration; if the output is in the form of a current, a simple
capacitor provides the integration function. Figure 17 shows
how this can be achieved. This method can also be applied in
squaring, dividing, and square rooting modes by appropriate
choice of terminals. This technique is used in the voltage
controlled low-pass filter and the differential input voltage-to-
frequency converter shown in the Applications Information
section.
0
9675-009
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
X INPUT
±10V FS
±12V PK
Y INPUT
±10V FS
±12V PK
I
OUT
=×
(X
1
– X
2
) (Y
1
– Y
2
)
10V
1
RS
INTEGRATOR
CAPACITOR
(SEE TEXT)
CURRENT-SENSING
RESISTOR, RS, 2kΩ MIN
Figure 17. Conversion of Output to Current
OPERATION AS A SQUARER
Operation as a squarer is achieved in the same fashion as the
multiplier except that the X and Y inputs are used in parallel.
The differential inputs can be used to determine the output
polarity (positive for X
1
= Y
l
and X
2
= Y
2
, negative if either one
of the inputs is reversed). Accuracy in the squaring mode is
typically a factor of 2 better than in the multiplying mode and
the largest errors occurring with small values of output for
input below 1 V.
If the application depends on accurate operation for inputs that
are always less than ±3 V, the use of a reduced value of SF is recom-
mended as described in the Functional Description section.
Alternatively, a feedback attenuator can be used to raise the
output level. This is put to use in the difference-of-squares
application to compensate for the factor of 2 loss involved in
generating the sum term (see Figure 20).
The difference of squares function is also used as the basis for a
novel rms-to-dc converter shown in Figure 27. The averaging
filter is a true integrator, and the loop seeks to zero its input. For
this to occur, (V
IN
)
2
− (V
OUT
)
2
= 0 V (for signals whose period is
well below the averaging time constant). Therefore, V
OUT
is
forced to equal the rms value of V
IN
. The absolute accuracy of
this technique is very high; at medium frequencies and for
signals near full scale, it is determined almost entirely by the
ratio of the resistors in the inverting amplifier. The multiplier
scaling voltage affects only open-loop gain. The data shown is
typical of performance that can be achieved with an AD534K,
but even using an AD534J, this technique can readily provide
better than 1% accuracy over a wide frequency range, even for
crest factors in excess of 10.
OPERATION AS A DIVIDER
Figure 18 shows the connection required for division. Unlike
earlier products, the AD534 provides differential operation on
both numerator and denominator, allowing the ratio of two
floating variables to be generated. Further flexibility results
from access to a high impedance summing input to Y
1
. As with
all dividers based on the use of a multiplier in a feedback loop,
the bandwidth is proportional to the denominator magnitude,
as shown in Figure 14.
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
–15V
X INPUT
(DENOMINATOR)
±10V FS
±12V PK
Z INPUT
(NUMERATOR)
±10V FS
±12V PK
OPTIONAL
SUMMING
INPUT
±10V PK
+
–
OUTPUT, ±12V PK =
10V (Z
2
– Z
1
)
(X
1
– X
2
)
+ Y
1
09675-010
Figure 18. Basic Divider Connection
Without additional trimming, the accuracy of the AD534K and
AD534L is sufficient to maintain a 1% error over a 10 V to 1 V
denominator range. This range can be extended to 100:1 by
simply reducing the X offset with an externally generated trim
voltage (range required is ±3.5 mV maximum) applied to the
unused X input (see Figure 3). To trim, apply a ramp of +100 mV
to +V at 100 Hz to both X
1
and Z
1
(if X
2
is used for offset adjust-
ment; otherwise, reverse the signal polarity) and adjust the trim
voltage to minimize the variation in the output
Because the output is near 10 V, it should be ac-coupled for
this adjustment. The increase in noise level and reduction in
bandwidth preclude operation much beyond a ratio of 100 to 1.