Datasheet

Data Sheet AD5737
Rev. C | Page 29 of 44
DAC Control Register
The DAC control register is used to configure each DAC channel. The DAC control register options are shown in Table 22 and Table 23.
Table 22. Programming the DAC Control Register
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0 1 0 X
1
X
1
X
1
X
1
INT_ENABLE CLR_EN OUTEN RSET DC_DC X
1
R2 R1 R0
1
X = don’t care.
Table 23. DAC Control Register Bit Descriptions
Bit Name Description
INT_ENABLE Powers up the dc-to-dc converter, DAC, and internal amplifiers for the selected channel. This bit applies to individual
channels only; it does not enable the output. After setting this bit, it is recommended that a >200 µs delay be observed
before enabling the output to reduce the output enable glitch. See Figure 24 for plots of this glitch.
CLR_EN Per-channel clear enable bit. This bit specifies whether the selected channel is cleared when the CLEAR pin is activated.
0 = channel is not cleared when the part is cleared (default).
1 = channel is cleared when the part is cleared.
OUTEN Enables or disables the selected output channel.
0 = channel disabled (default).
1 = channel enabled.
RSET Selects the internal current sense resistor or an external current sense resistor for the selected DAC channel.
0 = external resistor selected (default).
1 = internal resistor selected.
DC_DC Powers up or powers down the dc-to-dc converter on the selected channel. All dc-to-dc converters can be powered up
simultaneously using the DCDC_ALL bit in the main control register. To power down the dc-to-dc converter, the OUTEN
and INT_ENABLE bits must also be set to 0.
0 = dc-to-dc converter is powered down (default).
1 = dc-to-dc converter is powered up.
R2, R1, R0 Selects the output range to be enabled.
R2 R1 R0 Output Range Selected
0 0 0 Reserved
0 0 1 Reserved
0
1
0
Reserved
0 1 1 Reserved
1 0 0 4 mA to 20 mA current range
1 0 1 0 mA to 20 mA current range
1 1 0 0 mA to 24 mA current range