Datasheet

AD5737 Data Sheet
Rev. C | Page 32 of 44
Status Register
The status register is a read-only register. This register contains
any fault information, as a well as a ramp active bit (Bit D9) and
a user toggle bit (Bit D11). When the STATREAD bit in the
main control register is set, the status register contents can be
read back on the SDO pin during every write sequence. Alterna-
tively, if the STATREAD bit is not set, the status register can be
read using the normal readback operation (see the Readback
Operation section).
Table 31. Decoding the Status Register
MSB LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
DC-DCD DC-DCC DC-DCB DC-DCA
User
toggle
PEC
error
Ramp
active
Over
temp
X
1
X
1
X
1
X
1
I
OUT_D
fault
I
OUT_C
fault
I
OUT_B
fault
I
OUT_A
fault
1
X = don’t care.
Table 32. Status Register Bit Descriptions
Bit Name Description
DC-DCD
This bit is set if the dc-to-dc converter on Channel D cannot maintain compliance, for example, if the dc-to-dc converter is
reaching its V
MAX
voltage; in this case, the I
OUT_D
fault bit is also set. See the DC-to-DC Converter V
MAX
Functionality section for
more information about the operation of this bit under this condition.
DC-DCC
This bit is set if the dc-to-dc converter on Channel C cannot maintain compliance, for example, if the dc-to-dc converter is
reaching its V
MAX
voltage; in this case, the I
OUT_C
fault bit is also set. See the DC-to-DC Converter V
MAX
Functionality section for
more information about the operation of this bit under this condition.
DC-DCB
This bit is set if the dc-to-dc converter on Channel B cannot maintain compliance, for example, if the dc-to-dc converter is
reaching its V
MAX
voltage; in this case, the I
OUT_B
fault bit is also set. See the DC-to-DC Converter V
MAX
Functionality section for
more information about the operation of this bit under this condition.
DC-DCA
This bit is set if the dc-to-dc converter on Channel A cannot maintain compliance, for example, if the dc-to-dc converter is
reaching its V
MAX
voltage; in this case, the I
OUT_A
fault bit is also set. See the DC-to-DC Converter V
MAX
Functionality section for
more information about the operation of this bit under this condition.
User Toggle User toggle bit. This bit is set or cleared via the software register and can be used to verify data communications, if needed.
PEC Error Denotes a PEC error on the last data-word received over the SPI interface.
Ramp Active This bit is set while any output channel is slewing (digital slew rate control is enabled on at least one channel).
Over Temp This bit is set if the AD5737 core temperature exceeds approximately 150°C.
I
OUT_D
Fault This bit is set if a fault is detected on the I
OUT_D
pin.
I
OUT_C
Fault This bit is set if a fault is detected on the I
OUT_C
pin.
I
OUT_B
Fault This bit is set if a fault is detected on the I
OUT_B
pin.
I
OUT_A
Fault This bit is set if a fault is detected on the I
OUT_A
pin.