Datasheet

Data Sheet AD5737
Rev. C | Page 35 of 44
HART CONNECTIVITY
The AD5737 has four CHART pins, one corresponding to each
output channel. A HART signal can be coupled into these pins.
The HART signal appears on the corresponding current output,
if the output is enabled. Table 33 shows the recommended input
voltages for the HART signal at the CHART pin. If these voltages
are used, the current output should meet the HART amplitude
specifications.
Table 33. CHART Input Voltage to HART Output Current
R
SET
CHART Input Voltage Current Output (HART)
Internal R
SET
150 mV p-p 1 mA p-p
External R
SET
170 mV p-p 1 mA p-p
Figure 54 shows the recommended circuit for attenuating and
coupling the HART signal. A minimum capacitance of C1 + C2
is required to ensure that the 1.2 kHz and 2.2 kHz HART
frequencies are not significantly attenuated at the output. The
recommended values are C1 = 22 nF and C2 = 47 nF.
HART MODEM
OUTPUT
C1
C2
CHARTx
10067-076
Figure 54. Coupling the HART Signal
Digitally controlling the slew rate of the output is necessary to
meet the analog rate of change requirements for HART.
DIGITAL SLEW RATE CONTROL
The digital slew rate control feature of the AD5737 allows the
user to control the rate at which the output value changes. With
the slew rate control feature disabled, the output value changes
at a rate limited by the output drive circuitry and the attached
load. To reduce the slew rate, the user can enable the digital slew
rate control feature using the SREN bit of the slew rate control
register (see Table 28).
When slew rate control is enabled, the output, instead of slewing
directly between two values, steps digitally at a rate defined by
the SR_CLOCK and SR_STEP parameters. These parameters
are accessible via the slew rate control register (see Table 28).
• SR_CLOCK defines the rate at which the digital slew is
updated; for example, if the selected update rate is 8 kHz,
the output is updated every 125 µs.
• SR_STEP defines by how much the output value changes
at each update.
Together, these parameters define the rate of change of the
output value. Table 34 and Table 35 list the range of values for
the SR_CLOCK and SR_STEP parameters, respectively.
Table 34. Slew Rate Update Clock Options
SR_CLOCK Update Clock Frequency
1
0000 64 kHz
0001 32 kHz
0010 16 kHz
0011 8 kHz
0100 4 kHz
0101 2 kHz
0110 1 kHz
0111 500 Hz
1000 250 Hz
1001 125 Hz
1010 64 Hz
1011 32 Hz
1100 16 Hz
1101 8 Hz
1110 4 Hz
1111
0.5 Hz
1
These clock frequencies are divided down from the 13 MHz internal
oscillator (see Table 1, Figure 45, and Figure 46).
Table 35. Slew Rate Step Size Options
SR_STEP Step Size (LSB)
000 1
001 2
010
4
011 16
100 32
101 64
110 128
111 256
The following equation describes the slew rate as a function of
the step size, the update clock frequency, and the LSB size.
SizeLSBFrequencyClockUpdateSizeStep
ChangeOutput
RateSlew
××
=
where:
Slew Rate is expressed in seconds.
Output Change is expressed in amperes.
The update clock frequency for any given value is the same for
all output ranges. The step size, however, varies across output
ranges for a given value of step size because the LSB size is
different for each output range.