Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Revision History
- Functional Block Diagram
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Terminology
- Theory of Operation
- Registers
- Design Features
- Applications Information
- Layout Guidelines
- Outline Dimensions

AD5764R Data Sheet
Rev. D | Page 16 of 32
7000
3000
4000
5000
6000
2000
–1000
0
1000
–10 1050–5
OUTPUT VOLTAGE DELTA (µV)
SOURCE/SINK CURRENT (mA)
T
A
= 25°C
V
REFIN
= 5V
V
DD
/V
SS
= ±15V
V
DD
/V
SS
= ±12V
06064-042
Figure 25. Source and Sink Capability of Output Amplifier with
Positive Full Scale Loaded
10,000
7000
8000
9000
3000
4000
5000
6000
2000
–1000
0
1000
–12 83–2–7
OUTPUT VOLTAGE DELTA (µV)
SOURCE/SINK CURRENT (mA)
T
A
= 25°C
V
REFIN
= 5V
06064-043
V
DD
/V
SS
= ±15V
V
DD
/V
SS
= ±12V
Figure 26. Source and Sink Capability of Output Amplifier with
Negative Full Scale Loaded
CH1 3.00V M1.00µs CH1 –120mV
1
V
DD
/V
SS
= ±15V
T
A
= 25°C
V
REFIN
= 5V
1µs/DIV
06064-044
Figure 27. Full-Scale Settling Time
–4
–6
–8
–10
–12
–14
–16
–18
–20
–22
–24
–26
–2.0–1.5–1.0–0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
V
OUT
(mV)
TIME (µs)
V
DD
/V
SS
= ±12V,
V
REFIN
= 5V,
T
A
= 25°C,
0x8000 TO 0x7FFF,
500ns/DIV
06064-047
Figure 28. Major Code Transition Glitch Energy, V
DD
/V
SS
= ±12 V
CH4 50.0µV M1.00s CH4 26µV
4
V
DD
/V
SS
= ±15V
MIDSCALE LOADED
V
REFIN
= 0V
50µV/DIV
06064-048
Figure 29. Peak-to-Peak Noise (100 kHz Bandwidth)
CH1 10.0V
B
W
CH3 10.0mV
B
W
T 29.60%
CH2 10.0V M100µs A CH1 7.80mV
1
2
3
V
DD
/V
SS
= ±12V,
V
REFIN
= 5V, T
A
= 25°C,
RAMP TIME = 100µs,
LOAD = 200pF||10kΩ
T
06064-055
Figure 30. VOUTx vs. V
DD
/V
SS
on Power-Up