Datasheet

ManualsBrandsANALOG DEVICES ManualsPMICsPMIC - power monitoring Single phase SOIC 16 Surface-mount

Energy Metering IC with Integrated

Oscillator and Reverse Polarity Indication

AD71056

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

FEATURES

On-chip oscillator as clock source

High accuracy, supports 50 Hz/60 Hz IEC62053-21

Less than 0.1% error over a dynamic range of 500 to 1

Supplies average real power on frequency outputs (F1, F2)

High frequency output (CF) calibrates and supplies

instantaneous real power

Logic output (REVP) indicates potential miswiring or

negative power

Direct drive for electromechanical counters and 2-phase

stepper motors (F1, F2)

Proprietary ADCs and DSP provide high accuracy over large

variations in environmental conditions and time

On-chip power supply monitoring

On-chip creep protection (no load threshold)

On-chip reference 2.45 V (20 ppm/°C typical) with external

overdrive capability

Single 5 V supply, low power (20 mW typical)

Low cost CMOS process

GENERAL DESCRIPTION

The AD71056

is a high accuracy, electrical energy metering IC

with a precise oscillator circuit that serves as a clock source to

the chip. The AD71056 eliminates the need for an external

crystal or resonator, thus reducing the overall cost of building a

meter with this IC. The chip directly interfaces with the shunt

resistor.

The AD71056 specifications surpass the accuracy requirements

as quoted in the IEC62053-21 standard.

The only analog circuitry used in the AD71056 is in the Σ-Δ

ADCs and reference circuit. All other signal processing, such as

multiplication and filtering, is carried out in the digital domain.

This approach provides superior stability and accuracy over

time and in extreme environmental conditions.

The AD71056 supplies average real power information on F1

and F2, the low frequency outputs. These outputs either directly

drive an electromechanical counter or interface with an MCU.

The high frequency CF logic output, ideal for calibration

purposes, provides instantaneous real power information.

The AD71056 includes a power supply monitoring circuit on

the V

supply pin. The AD71056 remains inactive until the

supply voltage on V

reaches approximately 4 V. If the supply

falls below 4 V, the AD71056 also remains inactive and the F1,

F2, and CF outputs are in their nonactive modes.

Internal phase matching circuitry ensures that the voltage and

current channels are phase matched, and the HPF in the current

channel eliminates dc offsets. An internal no load threshold

ensures that the AD71056 does not exhibit creep when no load

is present.

The part is available in a 16-lead, narrow body SOIC package.

FUNCTIONAL BLOCK DIAGRAM

MULTIPLIER

REVP

V2P

V2N

V1P

RCLKIN

REF

IN/OUT

SCF

PHASE

CORRECTION

4kΩ

...110101...

SIGNAL

PROCESSING

BLOCK

POWER

SUPPLY MONITOR

Σ-Δ

ADC

V1N

AD71056

...11011001...

2.5V

REFERENCE

AGND

DGND

INTERNAL

OSCILLATOR

Σ-Δ

ADC

LPF

HPF

1 6 13

7 11 8 10 12 14 16 159

DIGITAL-TO-FREQUENCY

CONVERTER

05636-001

Figure 1.

U.S. Patents 5,745,323; 5,760,617; 5,862,069; 5,872,469; others pending.

Summary of content (20 pages)

PAGE 1
Energy Metering IC with Integrated Oscillator and Reverse Polarity Indication AD71056 FEATURES The AD71056 specifications surpass the accuracy requirements as quoted in the IEC62053-21 standard. On-chip oscillator as clock source High accuracy, supports 50 Hz/60 Hz IEC62053-21 Less than 0.
PAGE 2
AD71056 TABLE OF CONTENTS Features .............................................................................................. 1 Power Factor Considerations.................................................... 10 General Description ......................................................................... 1 Nonsinusoidal Voltage and Current........................................ 10 Functional Block Diagram .............................................................. 1 Applications.................
PAGE 3
AD71056 SPECIFICATIONS VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C, TMIN to TMAX = −40°C to +85°C, unless otherwise noted. Table 1. Parameter ACCURACY 1 , 2 Measurement Error1 on Channel V1 Value Unit Test Conditions/Comments 0.
PAGE 4
AD71056 Parameter POWER SUPPLY VDD IDD Value Unit 4.75 5.25 5 V min V max mA max Test Conditions/Comments For specified performance 5 V − 5% 5 V + 5% Typically 4 mA 1 See the Terminology section for an explanation of specifications. See plots in the Typical Performance Characteristics section. See the Analog Inputs section. 4 Sample tested during initial release and after any redesign or process change that may affect this parameter.
PAGE 5
AD71056 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. Parameter VDD to AGND VDD to DGND Analog Input Voltage to AGND V1P, V1N, V2P, and V2N Reference Input Voltage to AGND Digital Input Voltage to DGND Digital Output Voltage to DGND Operating Temperature Range Storage Temperature Range Junction Temperature 16-Lead Plastic SOIC, Power Dissipation θJA Thermal Impedance 1 Package Temperature Soldering 1 Rating −0.3 V to +7 V −0.3 V to +7 V −6 V to +6 V −0.3 V to VDD + 0.3 V −0.
PAGE 6
AD71056 TERMINOLOGY Measurement Error The error associated with the energy measurement made by the AD71056 is defined by the following formula: % Error = Energy Registered by AD71056 − True Energy True Energy × 100% Phase Error Between Channels The high-pass filter (HPF) in the current channel (Channel V1) has a phase-lead response. To offset this phase response and equalize the phase response between channels, a phase correction network is also placed in Channel V1.
PAGE 7
AD71056 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VDD 1 16 F1 V2P 2 15 F2 V2N 3 14 CF AD71056 TOP VIEW 13 DGND V1P 5 (Not to Scale) 12 REVP AGND 6 11 RCLKIN REFIN/OUT 7 10 S0 SCF 8 9 S1 05636-003 V1N 4 Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 Mnemonic VDD 2, 3 V2P, V2N 4, 5 V1N, V1P 6 AGND 7 REFIN/OUT 8 SCF 9, 10 S1, S0 11 RCLKIN 12 REVP 13 DGND 14 CF 15, 16 F2, F1 Description Power Supply.
PAGE 8
AD71056 TYPICAL PERFORMANCE CHARACTERISTICS VDD + 100nF 10µF 1 VDD 220V 200Ω 150nF 200Ω CF 14 REVP 12 + V1P 5 150nF 350µΩ 200Ω RCLKIN 11 + 3 K8 820Ω 6.2kΩ VDD V1N 4 10kΩ 150nF 1µF 2 PS2501-1 150nF 200Ω 4 V2N 3 K7 1 F2 15 U1 AD71056 40A TO 40mA U3 F1 16 V2P 2 S0 10 S1 9 REFIN/OUT 7 100nF SCF 8 10nF AGND DGND 6 10nF 13 10nF 05636-004 602kΩ Figure 4. Test Circuit for Performance Curves 1.0 0.8 0.6 +85°C 0.4 0.2 ERROR (% of Reading) +25°C 0 –0.2 –40°C –0.
PAGE 9
AD71056 0.5 40 0.4 30 0.2 PF = 0.5 IND PF = 1 0.1 FREQUENCY ERROR (% of Reading) 0.3 DISTRIBUTION CHARACTERISTICS MEAN = 2.247828 EXTERNAL REFERENCE SDs = 1.367176 TEMPERATURE = 25°C MIN = –2.09932 MAX = +5.28288 NO. OF POINTS = 100 0 –0.1 –0.2 PF = 0.5 CAP 20 10 –0.4 –0.5 45 50 55 60 0 65 05636-012 05636-009 –0.3 –5 –4 –3 –2 –1 1.0 40 0.4 3 4 5 6 7 8 9 DISTRIBUTION CHARACTERISTICS MEAN = –1.563484 SDs = 2.040699 EXTERNAL REFERENCE MIN = –6.
PAGE 10
AD71056 THEORY OF OPERATION The two ADCs in the AD71056 digitize the voltage signals from the current and voltage sensors. These ADCs are 16-bit, Σ-Δ with an oversampling rate of 450 kHz. This analog input structure greatly simplifies sensor interfacing by providing a wide dynamic range for direct connection to the sensor and also simplifies the antialiasing filter design. A high-pass filter in the current channel removes any dc component from the current signal.
PAGE 11
AD71056 ( ∞ i(t ) = I 0 + 2 × ∑ I × sin hω t + β h h h≠o ) (3) where: i(t) is the instantaneous current. I0 is the dc component. Ih is the rms value of Current Harmonic h. βh is the phase angle of the current harmonic. In Equation 5, a harmonic real power component is generated for every harmonic, provided that harmonic is present in both the voltage and current waveforms. The power factor calculation has previously been shown to be accurate in the case of a pure sinusoid.
PAGE 12
AD71056 APPLICATIONS ANALOG INPUTS Channel V1 (Current Channel) The voltage output from the current sensor is connected to the AD71056 at Channel V1. Channel V1 is a fully differential voltage input. V1P is the positive input with respect to V1N. The maximum peak differential signal on Channel V1 should be less than ±30 mV (21 mV rms for a pure sinusoidal signal) for specified operation.
PAGE 13
AD71056 POWER SUPPLY MONITOR The AD71056 contains an on-chip power supply monitor. The power supply (VDD) is continuously monitored by the AD71056. If the supply is less than 4 V, the AD71056 becomes inactive. This is useful to ensure proper device operation at power-up and power-down. The power supply monitor has built-in hysteresis and filtering that provide a high degree of immunity to false triggering from noisy supplies. In Figure 21, the trigger level is nominally set at 4 V.
PAGE 14
AD71056 Digital-to-Frequency Conversion As previously described, the digital output of the low-pass filter after multiplication contains the real power information. However, because this LPF is not an ideal brick wall filter implementation, the output signal also contains attenuated components at the line frequency and its harmonics—that is, cos(hωt), where h = 1, 2, 3, . . . and so on. The magnitude response of the filter is given by 1 (7) f2 1+ 4.
PAGE 15
AD71056 The energy consumed during an integration period is given by Frequency Outputs F1 and F2 Counter Energy = Average Power × Time = × Time = Counter Time (9) For the purpose of calibration, this integration time can be as long as 10 seconds to 20 seconds to accumulate enough pulses to ensure correct averaging of the frequency. In normal operation, the integration time can be reduced to one or two seconds, depending, for example, on the required update rate of a display.
PAGE 16
AD71056 Table 6. Maximum Output Frequency on the F1 and F2 Pins S1 0 0 1 1 1 S0 0 1 0 1 OSC Relation 0.204 × f1 0.204 × f2 0.204 × f3 0.204 × f4 1 Max Frequency or AC Inputs (Hz) 0.175 0.35 0.70 1.40 Values are generated using the nominal frequency of 450 kHz. Frequency Output CF The Pulse Output CF (calibration frequency) is intended for calibration purposes. The output pulse rate on CF can be up to 2048 times the pulse rate on the F1 and F2 pins.
PAGE 17
AD71056 to active power. The CF output frequencies are given in Table 7. As with F1 and F2, if the period of CF (t5) falls below 180 ms, the CF pulse width is set to half the period. If the CF frequency, for example, is 20 Hz, the CF pulse width is 25 ms. When the high frequency mode is selected (that is, SCF = 0, S1 = S0 = 1), the CF pulse width is fixed at 35 μs. Therefore, t4 is always 35 μs, regardless of the output frequency on CF. output frequency at F1 or F2 equals 0.00244% of 3.43 Hz or 8.
PAGE 18
AD71056 OUTLINE DIMENSIONS 10.00 (0.3937) 9.80 (0.3858) 4.00 (0.1575) 3.80 (0.1496) 9 16 1 8 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 6.20 (0.2441) 5.80 (0.2283) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 0.50 (0.0197) 0.25 (0.0098) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.
PAGE 19
AD71056 NOTES Rev.