Datasheet

AD712
Rev. G | Page 16 of 20
200ns
500mV
PD711 BUFF
–10V ADC IN
1mV
100
10
0%
90
00823-044
Figure 44. ADC Input Unity Gain Buffer Recovery Times, −10 V ADC IN
200ns
500mV
PD711 BUFF
–5V ADC IN
1mV
100
10
0%
90
00823-045
Figure 45. ADC Input Unity Gain Buffer Recovery Times, −5 V ADC IN
DRIVING A LARGE CAPACITIVE LOAD
The circuit in Figure 46 uses a 100 Ω isolation resistor that
enables the amplifier to drive capacitive loads exceeding
1500 pF; the resistor effectively isolates the high frequency
feedback from the load and stabilizes the circuit. Low frequency
feedback is returned to the amplifier summing junction via the
low-pass filter formed by the 100 Ω series resistor and the Load
Capacitance C
L
. Figure 47 shows a typical transient response for
this connection.
1/2
AD712
0.1µF
0.1µF
–V
IN
+V
IN
INPUT
R
1
2kΩ 1500pF
10kΩ 1500pF
20Ω 1000pF
C1 R1
4.99kΩ
4.99kΩ
30pF
OUTPUT
100Ω
+
–
–
+
TYPICAL CAPACITANCE
LIMIT FOR VARIOUS
LOAD RESISTORS
C
1
UP TO
+
–
00823-046
Figure 46. Circuit for Driving a Large Capacitive Load
5V
1µs
100
10
0%
90
00823-047
Figure 47. Transient Response R
L
= 2 kΩ, C
L
= 500 pF