Datasheet

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AD7176-2 Data Sheet

Rev. A | Page 50 of 68

Bits Bit Name Settings Description Reset Access

[3:2] CRC_EN Enables CRC protection of register reads/writes. CRC increases the

number of bytes in a serial interface transfer by one. See the CRC

Calculation section for more details.

0x00 RW

00 Disabled.

XOR checksum enabled for register read transactions. Register writes will

still use CRC with these bits set.

10 CRC checksum enabled for read and write transactions.

1 RESERVED This bit is reserved and should be set to 0. 0x0 R

0 WL16 Changes the ADC Data Register to 16 bits. The ADC is not reset by a write

to the Interface Mode Register; therefore, the ADC result will not be

rounded to the correct word length immediately after writing to these

bits. The first new ADC result will be correct.

0x0 RW

0 24-bit data

1 16-bit data

Address: 0x03, Reset: 0x000000, Name: REGCHECK

This Register Check Register is a 24-bit checksum calculated by exclusively OR'ing the contents of the user registers. The REG_CHECK

bit in the Interface Mode Register must be set for this to operate; otherwise, the register reads 0.

Table 26. Bit Descriptions for REGCHECK

Bits

Bit Name

Settings

Description

Reset

Access

[23:0] REGISTER_CHECK This register contains the 24-bit checksum of user registers when the

REG_CHECK bit is set in the Interface Mode Register.

0x000000 R

DATA REGISTER

Address: 0x04, Reset: 0x000000, Name: DATA

The Data Register contains the ADC conversion result. The encoding is offset binary, or it can be changed to unipolar by the

BI_UNIPOLAR bit in the Setup Configuration Register. Reading the Data Register brings the

RDY

bit and pin high if they had been low.

The ADC result can be read multiple times; however, because

RDY

has been brought high, it is not possible to know if another ADC

result is imminent. The ADC will not write a new result into the data register if the register is currently being read.

Table 27. Bit Descriptions for DATA

Bits Bit Name Settings Description Reset Access

[23:0] DATA This register contains the ADC conversion result. If DATA_STAT is set in

the Interface Mode Register, then the Status Register is appended to this

Interface Mode Register, then this register is rounded to 16 bits.

0x000000 R