Datasheet

ManualsBrandsANALOG DEVICES ManualsLinear ICsAD725ARZ

Low Cost RGB to NTSC/PAL Encoder

with Luma Trap Port

AD725

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700 World Wide Web Site: http://www.analog.com

Fax: 781/326-8703 © Analog Devices, Inc., 1997

FEATURES

Composite Video Output: Both NTSC and PAL

Chrominance and Luminance (S-Video) Outputs

Luma Trap Port to Eliminate Cross Color Artifacts

TTL Logic Levels

Integrated Delay Line and Auto-Tuned Filters

Drives 75 V Reverse-Terminated Loads

Low Power +5 V Operation

Power-Down to <1 mA

Very Low Cost

APPLICATIONS

RGB/VGA to NTSC/PAL Encoding

Personal Computers/Network Computers

Video Games

Video Conference Cameras

Digital Still Cameras

PRODUCT DESCRIPTION

The AD725 is a very low cost general purpose RGB to NTSC/

PAL encoder that converts red, green and blue color compo-

nent signals into their corresponding luminance (baseband

amplitude) and chrominance (subcarrier amplitude and phase)

signals in accordance with either NTSC or PAL standards.

These two outputs are also combined on-chip to provide a

composite video output. All three outputs are available sepa-

rately at voltages of twice the standard signal levels as re-

quired for driving 75 Ω, reverse-terminated cables.

The AD725 features a luminance trap (YTRAP) pin that pro-

vides a means of reducing cross color generated by subcarrier

frequency components found in the luminance signal. For por-

table or other power-sensitive applications, the device can be

powered down to less than 1 µA of current consumption. All

logic levels are TTL compatible thus supporting the logic re-

quirements of 3 V CMOS systems.

The AD725 is packaged in a low cost 16-lead SOIC and oper-

ates from a +5 V supply.

FUNCTIONAL BLOCK DIAGRAM

4FSC

NTSC/PAL

HSYNC

VSYNC

BURST

NTSC/PAL

FSC 90

FSC 0

4FSC

FSC 90

C/270

CSYNC

RED

GREEN

BLUE

CSYNC

BALANCED

MODULATORS

NTSC/PAL

LUMINANCE

OUTPUT

COMPOSITE

OUTPUT

CHROMINANCE

OUTPUT

CLOCK

AT 8FSC

SYNC

SEPARATOR

QUADRATURE

DECODER

BURST

3-POLE

LP PRE-

FILTER

4-POLE

LPF

4-POLE

LPF

180

(PAL ONLY)

RGB-TO-YUV

ENCODING

MATRIX

SAMPLED-

DATA

DELAY LINE

4-POLE

LPF

2-POLE

LP POST-

FILTER

LUMINANCE

TRAP

4FSC CLOCK

CLAMP

XNOR

REV. 0

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

Summary of content (20 pages)

PAGE 1
a Low Cost RGB to NTSC/PAL Encoder with Luma Trap Port AD725 FEATURES Composite Video Output: Both NTSC and PAL Chrominance and Luminance (S-Video) Outputs Luma Trap Port to Eliminate Cross Color Artifacts TTL Logic Levels Integrated Delay Line and Auto-Tuned Filters Drives 75 V Reverse-Terminated Loads Low Power +5 V Operation Power-Down to <1 mA Very Low Cost PRODUCT DESCRIPTION APPLICATIONS RGB/VGA to NTSC/PAL Encoding Personal Computers/Network Computers Video Games Video Conference Cameras Digital
PAGE 2
(Unless otherwise noted, VS = +5, TA = +258C, using 4FSC synchronous clock. All loads are AD725–SPECIFICATIONS 150 V 6 5% at the IC pins. Outputs are measured at the 75 V reverse terminated load.) Parameter Conditions SIGNAL INPUTS (RIN, GIN, BIN) Input Amplitude Black Level1 Input Resistance2 Input Capacitance Min Typ Full Scale Max Units 714 mV p-p V MΩ pF 1 V V µA µA 0.
PAGE 3
AD725 ABSOLUTE MAXIMUM RATINGS* PIN CONFIGURATION 16-Lead Wide Body (SOIC) (R-16) Supply Voltage, APOS to AGND . . . . . . . . . . . . . . . . . . +6 V Supply Voltage, DPOS to DGND . . . . . . . . . . . . . . . . . . +6 V AGND to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V Inputs . . . . . . . . . . . . . . . . . . . DGND – 0.3 to DPOS + 0.3 V Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . . 800 mW Operating Temperature Range . . . . . . . . . . . .
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AD725 PIN DESCRIPTIONS Pin Mnemonic Description Equivalent Circuit 1 STND Circuit A 2 3 AGND 4FSC 4 5 APOS CE 6 RIN 7 GIN 8 BIN 9 CRMA 10 COMP 11 LUMA 12 13 14 15 16 YTRAP DGND DPOS VSYNC HSYNC Encoding Standard Pin. A Logic HIGH input selects NTSC encoding. A Logic LOW input selects PAL encoding. TTL Logic Levels. Analog Ground Connection. 4FSC Clock Input. For NTSC: 14.318 180 MHz. For PAL: 17.734 475 MHz. TTL Logic Levels. Analog Positive Supply (+5 V ± 5%). Chip Enable.
PAGE 5
Typical Characteristics–AD725 +5V COMPOSITE SYNC TEKTRONIX TG2000 SIGNAL GENERATION PLATFORM COMPOSITE VIDEO AD725 RGB TO NTSC/PAL ENCODER RGB SONY MONITOR MODEL PVM-1354Q 3 75V 4FSC GENLOCK FSC (3.579545MHz OR 4.433618MHz) OSCILLATOR 75V FSC HP3314A 3 4 PLL TEKTRONIX VM700A WAVEFORM MONITOR Figure 2. Evaluation Setup 1.0 1.0 APL = 50.8% 525 LINE NTSC NO FILTERING SLOW CLAMP TO 0.00V @ 6.63ms APL = 50.6% 625 LINE PAL NO FILTERING SLOW CLAMP TO 0.00V @ 6.72ms 100 0.5 0.
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AD725–Typical Characteristics 1.0 1.0 APL = 46.6% 525 LINE NTSC NO FILTERING SLOW CLAMP TO 0.00V @ 6.63ms APL = 33.5% 625 LINE PAL NO FILTERING SLOW CLAMP TO 0.00V @ 6.72 ms 100 0.5 0.5 VOLTS IRE VOLTS 50 0.0 0.0 0 –50 –0.5 0 10 20 30 ms 40 50 –0.5 60 Figure 7. Modulated Pulse and Bar, NTSC 200mV 0 10 20 30 ms 40 50 60 Figure 9. Modulated Pulse and Bar, PAL 1ms 200mV 1ms Figure 10. Zoom on Modulated Pulse, PAL Figure 8. Zoom on Modulated Pulse, NTSC –6– REV.
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AD725 1.0 1.0 APL = 48.2% 525 LINE NTSC NO FILTERING SLOW CLAMP TO 0.00V @ 6.63ms APL = 48.2% 625 LINE PAL NO FILTERING SLOW CLAMP TO 0.00V @ 6.72ms 100 100 0.5 0.5 0.5MHz 1MHz 2MHz 3MHz 4MHz 50 IRE VOLTS IRE VOLTS 50 1MHz 5MHz 0.0 2MHz 3MHz 4MHz 5MHz 6MHz 0.0 0 0 –50 –50 –0.5 –0.5 0 10 20 30 ms 40 50 60 0 10 30 ms 40 50 60 Figure 14. Multiburst, PAL Figure 11. Multiburst, NTSC H TIMING (PAL) H TIMING MEASUREMENT RS–170A (NTSC) FIELD = 1 LINE = 22 LINE = 25 9.
PAGE 8
AD725 Following the dc clamps, the RGB inputs are buffered and split into two signal paths for constructing the luminance and chrominance outputs. THEORY OF OPERATION The AD725 is a predominantly analog design, with digital logic control of timing. This timing logic is driven by a external frequency reference at four times the color subcarrier frequency, input into the 4FSC pin of the AD725. This frequency should be 14.318 180 MHz for NTSC encoding, and 17.734 475 MHz for PAL encoding.
PAGE 9
AD725 The reconstructed luma signal is then smoothed with a two pole Bessel low-pass filter. This filter has a –3 dB bandwidth of 5.25 MHz for NTSC, 6.5 MHz for PAL. A final buffer provides current drive for the LUMA output pin. Chrominance Signal Path The chrominance path begins with the U and V color-difference matrices. The AD725 uses U and V modulation vectors for NTSC and PAL (+U being defined as 0 degrees phase), simplifying the design compared to I and Q designs.
PAGE 10
AD725 HSYNC/VSYNC (USER INPUTS) tSW RIN/GIN BIN (USER INPUTS) tSB tSM MODULATOR RESTORE tMW INPUT CLAMPS tSR tRW BURST FLAG/ DELAY LINE RESET tSD tDW LUMA tSS tBY tBC tSC CRMA Figure 18. Timing Diagram (Not to Scale) Table I. Timing Description (See Figure 18) NTSC1 Symbol Name Description tSW Sync Width tSB Sync to Blanking End Sync to Modulator Restore Modulator Restore Width Sync to RGB DC Restore DC Restore Width Input valid sync width for burst insertion (user-controlled).
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AD725 APPLYING THE AD725 Inputs The AD725 will operate with subcarrier frequencies that deviate quite far from those specified by the TV standards. However, the monitor will in general not be quite so forgiving. Most monitors can tolerate a subcarrier frequency that deviates several hundred Hz from the nominal standard without any degradation in picture quality. These conditions imply that the subcarrier frequency accuracy is a system specification and not a specification of the AD725 itself.
PAGE 12
AD725 system, the internal 4FSC (14.318 180 MHz) clock that drives the VGA controller can be used for 4FSC on the AD725. This signal is not directly accessible from outside the computer, but it does appear on the VGA card. (A 1FSC-input encoder, the AD724, is also available.) Displaying VGA Output on a TV The AD725 can be used to convert the analog RGB output from a personal computer’s VGA card to the NTSC or PAL television standards.
PAGE 13
AD725 Low Cost Crystal Oscillator A low cost oscillator can be made that provides a CW clock that can be used to drive both the AD725 4FSC and other devices in the system that require a clock at this frequency. Figure 20 shows a circuit that uses one inverter of a 74HC04 package to create a crystal oscillator and another inverter to buffer the oscillator and drive other loads.
PAGE 14
AD725 Vertical Scaling NONINTERLACED In addition to converting the computer generated image from noninterlaced to interlaced format, it is also necessary to scale the image down to fit into NTSC or PAL format. The most common vertical lines/screen for VGA display are 480 and 600 lines. NTSC can only accommodate approximately 400 visible lines/frame (200 per field), PAL can accommodate 576 lines/ frame (288 per field).
PAGE 15
AD725 within the chroma band. All signals in this band are processed as chroma information since the chroma processing circuit has no knowledge as to where these signals originated. Therefore, the color that results from the luma signals in the chroma band is a false color. This effect is referred to as cross chrominance. quality. S-video will not just eliminate cross chrominance, but will also not have this notch in the luma response.
PAGE 16
AD725 Measuring the Luma Trap Frequency Response The frequency response of the luma trap can be measured in two different ways. The first involves using an RGB frequency sweep input pattern into the AD725 and observing the composite output on a TV monitor, a TV waveform monitor or on an oscilloscope.
PAGE 17
AD725 6 signal should occur at the output of an on-chip XNOR gate on the AD725 whose two inputs are HSYNC (Pin 16) and VSYNC (Pin 15). There are several options for meeting these conditions. 3 0 LUMA PIN The first is to have separate signals for HSYNC and VSYNC. Each should be mostly low and then high going during their respective time of assertion. This is the convention used by RGB monitors for most PCs.
PAGE 18
AD725 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 16-Lead Wide Body SOIC (R-16) 9 1 8 PIN 1 0.0118 (0.30) 0.0040 (0.10) 0.0500 (1.27) BSC 0.4193 (10.65) 0.3937 (10.00) 16 0.2992 (7.60) 0.2914 (7.40) 0.4133 (10.50) 0.3977 (10.00) 0.1043 (2.65) 0.0926 (2.35) 0.0291 (0.74) x 45° 0.0098 (0.25) 8° 0.0500 (1.27) 0.0192 (0.49) SEATING 0.0125 (0.32) 0° 0.0157 (0.40) 0.0138 (0.35) PLANE 0.0091 (0.23) –18– REV.
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