Datasheet

ManualsBrandsANALOG DEVICES ManualsData collecting ICsData acquisition IC - DA converter (DAC) PLCC 20

REV. B

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

AD7541A

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 617/329-4700 World Wide Web Site: http://www.analog.com

Fax: 617/326-8703 © Analog Devices, Inc., 1997

CMOS

12-Bit Monolithic Multiplying DAC

FUNCTIONAL BLOCK DIAGRAM

10kΩ 10kΩ 10kΩ

20kΩ 20kΩ 20kΩ 20kΩ 20kΩ

S1 S2 S3 S12

REF

OUT2

OUT1

FEEDBACK

BIT 12 (LSB)BIT 3BIT 2BIT 1 (MSB)

DIGITAL INPUTS (DTL/TTL/CMOS COMPATIBLE)

LOGIC: A SWITCH IS CLOSED TO I

OUT1

FOR

ITS DIGITAL INPUT IN A "HIGH" STATE.

10kΩ

FEATURES

Improved Version of AD7541

Full Four-Quadrant Multiplication

12-Bit Linearity (Endpoint)

All Parts Guaranteed Monotonic

TTL/CMOS Compatible

Low Cost

Protection Schottky Diodes Not Required

Low Logic Input Leakage

GENERAL DESCRIPTION

The Analog Devices AD7541A is a low cost, high performance

12-bit monolithic multiplying digital-to-analog converter. It is

fabricated using advanced, low noise, thin film on CMOS

technology and is available in a standard 18-lead DIP and in

20-terminal surface mount packages.

The AD7541A is functionally and pin compatible with the in-

dustry standard AD7541 device and offers improved specifica-

tions and performance. The improved design ensures that the

device is latch-up free so no output protection Schottky diodes

are required.

This new device uses laser wafer trimming to provide full 12-bit

endpoint linearity with several new high performance grades.

PRODUCT HIGHLIGHTS

Compatibility: The AD7541A can be used as a direct replace-

ment for any AD7541-type device. As with the Analog Devices

AD7541, the digital inputs are TTL/CMOS compatible and

have been designed to have a ±1 µA maximum input current

requirement so as not to load the driving circuitry.

Improvements: The AD7541A offers the following improved

specifications over the AD7541:

1. Gain Error for all grades has been reduced with premium

grade versions having a maximum gain error of ±3 LSB.

2. Gain Error temperature coefficient has been reduced to

2 ppm/°C typical and 5 ppm/°C maximum.

3. Digital-to-analog charge injection energy for this new device

is typically 20% less than the standard AD7541 part.

4. Latch-up proof.

5. Improvements in laser wafer trimming provides 1/2 LSB max

differential nonlinearity for top grade devices over the operat-

ing temperature range (vs. 1 LSB on older 7541 types).

6. All grades are guaranteed monotonic to 12 bits over the

operating temperature range.

ORDERING GUIDE

Relative Gain

Temperature Accuracy Error Package

Model

Range T

MIN

to T

MAX

= +258C Options

AD7541AJN 0°C to +70°C ±1 LSB ±6 LSB N-18

AD7541AKN 0°C to +70°C ±1/2 LSB ±1 LSB N-18

AD7541AJP 0°C to +70°C ±1 LSB ±6 P-20A

AD7541AKP 0°C to +70°C ±1/2 LSB ±1 P-20A

AD7541AKR 0°C to +70°C ±1/2 LSB ±1 R-18

AD7541AAQ –25°C to +85°C ±1 LSB ±6 LSB Q-18

AD7541ABQ –25°C to +85°C ±1/2 LSB ±1 LSB Q-18

AD7541ASQ –55°C to +125°C ±1 LSB ±6 LSB Q-18

AD7541ATQ –55°C to +125°C ±1/2 LSB ±1 LSB Q-18

AD7541ASE –55°C to +125°C ±1 LSB ±6 LSB E-20A

AD7541ATE –55°C to +125°C ±1/2 LSB ±1 LSB E-20A

NOTES

Analog Devices reserves the right to ship either ceramic (D-18) or cerdip (Q-18)

hermetic packages.

To order MIL-STD-883, Class B process parts, add /883B to part number. Contact

local sales office for military data sheet.

E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P = Plastic Leaded Chip

Carrier; Q = Cerdip; R = Small Outline IC.

Summary of content (8 pages)

PAGE 1
a CMOS 12-Bit Monolithic Multiplying DAC AD7541A FEATURES Improved Version of AD7541 Full Four-Quadrant Multiplication 12-Bit Linearity (Endpoint) All Parts Guaranteed Monotonic TTL/CMOS Compatible Low Cost Protection Schottky Diodes Not Required Low Logic Input Leakage FUNCTIONAL BLOCK DIAGRAM 10kΩ 10kΩ 10kΩ VREF 20kΩ S1 20kΩ 20kΩ S2 S3 20kΩ 20kΩ S12 OUT2 OUT1 10kΩ RFEEDBACK GENERAL DESCRIPTION BIT 1 (MSB) BIT 2 BIT 3 BIT 12 (LSB) The Analog Devices AD7541A is a low cost, high performan
PAGE 2
AD7541A–SPECIFICATIONS (V DD = +15 V, VREF = +10 V; OUT 1 = OUT 2 = GND = 0 V unless otherwise noted) Version TA = +258C TA = TMIN, TMAX1 Units All J, A, S K, B, T J, A, S K, B, T J, A, S K, B, T 12 ±1 ± 1/2 ±1 ± 1/2 ±6 ±3 12 ±1 ± 1/2 ±1 ± 1/2 ±8 ±5 Bits LSB max LSB max LSB max LSB max LSB max LSB max All 5 5 ppm/°C max Typical Value Is 2 ppm/°C.
PAGE 3
AD7541A Operating Temperature Range Commercial (J, K Versions) . . . . . . . . . . . . . 0°C to +70°C Industrial (A, B Versions) . . . . . . . . . . . . . –25°C to +85°C Extended (S, T Versions) . . . . . . . . . . . . . –55°C to +125°C Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300°C ABSOLUTE MAXIMUM RATINGS* (TA = +25°C unless otherwise noted) VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 4
AD7541A APPLICATIONS GENERAL CIRCUIT INFORMATION The simplified D/A circuit is shown in Figure 1. An inverted R-2R ladder structure is used—that is, the binarily weighted currents are switched between the OUT1 and OUT2 bus lines, thus maintaining a constant current in each ladder leg independent of the switch state. 10kΩ 10kΩ UNIPOLAR BINARY OPERATION (2-QUADRANT MULTIPLICATION) Figure 4 shows the analog circuit connections required for unipolar binary (2-quadrant multiplication) operation.
PAGE 5
AD7541A BIPOLAR OPERATION (4-QUADRANT MULTIPLICATION) Figure 5 and Table III illustrate the circuitry and code relationship for bipolar operation. With a dc reference (positive or negative polarity) the circuit provides offset binary operation. With an ac reference the circuit provides full 4-quadrant multiplication. With the DAC loaded to 1000 0000 0000, adjust R1 for VOUT = 0 V (alternatively, one can omit R1 and R2 and adjust the ratio of R3 to R4 for VOUT = 0 V).
PAGE 6
AD7541A SINGLE SUPPLY OPERATION Figure 7 shows the AD7541A connected in a voltage switching mode. OUT1 is connected to the reference voltage and OUT2 is connected to GND. The D/A converter output voltage is available at the VREF pin (Pin 17) and has a constant output impedance equal to RLDR. The feedback resistor RFB is not used in this circuit.
PAGE 7
AD7541A OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Terminal Ceramic Leadless Chip Carrier (E-20A) 0.075 (1.91) REF 0.100 (2.54) 0.064 (1.63) 0.095 (2.41) 0.075 (1.90) 0.358 (9.09) 0.358 (9.09) 0.342 (8.69) MAX SQ SQ 0.200 (5.08) BSC 0.015 (0.38) MIN 3 4 1 0.055 (1.40) 0.045 (1.14) 0.056 (1.42) 0.042 (1.07) 19 18 PIN 1 IDENTIFIER TOP VIEW (PINS DOWN) 8 0.050 (1.27) BSC 8 0.150 (3.81) BSC 0.005 (0.13) MIN 1 9 PIN 1 0.022 (0.558) 0.014 (0.356) 0.070 (1.77) 0.045 (1.
PAGE 8
–8– PRINTED IN U.S.A.