8-Channel Differential DAS with 18-Bit, Bipolar, Simultaneous Sampling ADC AD7609 Data Sheet FEATURES APPLICATIONS 8 simultaneously sampled inputs True differential inputs True bipolar analog input ranges: ±10 V, ±5 V Single 5 V analog supply and 2.3 V to 5.
AD7609 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Converter Details ....................................................................... 21 Applications ....................................................................................... 1 Analog Input ............................................................................... 21 Companion Products .....................................................
Data Sheet AD7609 GENERAL DESCRIPTION The AD7609 is an 18-bit, 8-channel, true differential, simultaneous sampling analog-to-digital data acquisition system (DAS). The part contains analog input clamp protection, a second-order antialiasing filter, a track-and-hold amplifier, an 18-bit charge redistribution successive approximation analogto-digital converter (ADC), a flexible digital filter, a 2.5 V reference and reference buffer, and high speed serial and parallel interfaces.
AD7609 Data Sheet SPECIFICATIONS VREF = 2.5 V external/internal, AVCC = 4.75 V to 5.25 V, VDRIVE = 2.3 V to 5.25 V; fSAMPLE = 200 kSPS, TA = TMIN to TMAX, unless otherwise noted. 1 Table 2.
Data Sheet Parameter ANALOG INPUT Differential Input Voltage Ranges Absolute Voltage Input Common-Mode Input Range CMRR Analog Input Current Input Capacitance 7 Input Impedance REFERENCE INPUT/OUTPUT Reference Input Voltage Range DC Leakage Current Input Capacitance7 Reference Output Voltage Reference Temperature Coefficient LOGIC INPUTS Input High Voltage (VINH) Input Low Voltage (VINL) Input Current (IIN) Input Capacitance (CIN)7 LOGIC OUTPUTS Output High Voltage (VOH) Output Low Voltage (VOL) Floating-
AD7609 Parameter Power Dissipation Normal Mode (Static) Normal Mode (Operational) 8 Standby Mode Shutdown Mode Data Sheet Test Conditions/Comments fSAMPLE = 200 kSPS Min Typ Max Unit 80 100 25 10 115.5 157 42 60.5 mW mW mW µW Temperature range for B version is −40°C to +85°C. See the Terminology section. This specification applies when reading during a conversion or after a conversion. If reading during a conversion in parallel and serial modes with VDRIVE = 5 V, SNR typically reduces by 1.
Data Sheet AD7609 TIMING SPECIFICATIONS AVCC = 4.75 V to 5.25 V, VDRIVE = 2.3 V to 5.25 V, VREF = 2.5 V external reference/ internal reference, TA = TMIN to TMAX, unless otherwise noted. 1 Table 3. Parameter PARALLEL/SERIAL/BYTE MODE tCYCLE Limit at TMIN, TMAX Min Typ Max Unit 5 µs 10.1 11.5 µs µs µs 4.15 9.1 18.8 39 78 158 315 100 µs µs µs µs µs µs µs µs 30 ms 13 ms 5 tCONV 3.45 7.87 16.
AD7609 Parameter t13 Data Sheet Limit at TMIN, TMAX Min Typ Max Unit 19 24 30 37 ns ns ns ns 19 24 30 37 22 ns ns ns ns ns ns ns 20 15 12.5 10 MHz MHz MHz MHz 18 23 35 ns ns ns 20 26 32 39 ns ns ns ns ns ns 22 ns 18 23 30 35 18 23 30 35 ns ns ns ns ns ns ns ns ns 19 23 30 35 ns ns ns ns t143 t15 t16 t17 6 6 SERIAL READ OPERATION fSCLK t18 t19 3 t20 t21 t22 t23 0.4 tSCLK 0.
Data Sheet AD7609 Limit at TMIN, TMAX Min Typ Max Parameter t27 Unit 22 29 ns ns 20 27 29 ns ns ns t28 t29 Description Delay from RD falling edge to FRSTDATA low VDRIVE = 3.3 V to 5.25 V VDRIVE = 2.3 V to 2.7 V Delay from 18th SCLK falling edge to FRSTDATA low VDRIVE = 3.3 V to 5.25 V VDRIVE = 2.3 V to 2.7 V Delay from CS rising edge until FRSTDATA three-state enabled Sample tested during initial release to ensure compliance.
AD7609 Data Sheet t12 CS, RD t16 t13 V1 [17:2] V1 [1:0] V2 [17:2] V2 [1:0] V7 [17:2] V7 [1:0] V8 [17:2] t17 V8 [1:0] 09760-005 DATA: DB[15:0] FRSTDATA Figure 5. CS and RD Linked Parallel Mode CS t21 SCLK t19 t18 DOUTA, DOUTB t20 DB17 t22 DB14 DB13 t25 DB1 t23 DB0 t29 09760-006 t28 FRSTDATA Figure 6. Serial Read Operation Rev.
Data Sheet AD7609 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4.
AD7609 Data Sheet V1– V1+ V2– V2+ V3– V3+ V4– V4+ V5– 64 63 62 61 60 59 58 V5+ V6– V6+ V7+ V7– V8+ V8– PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 57 56 55 54 53 52 51 50 49 48 AVCC AVCC 1 ANALOG INPUT DECOUPLING CAPACITOR PIN PIN 1 AGND 2 OS 0 3 POWER SUPPLY OS 1 4 GROUND PIN OS 2 5 47 AGND 46 REFGND 45 REFCAPB 44 REFCAPA PAR/SER SEL 6 DATA OUTPUT STBY 7 DIGITAL OUTPUT REFERENCE INPUT/OUTPUT 42 REFIN/REFOUT TOP VIEW (Not to Scale) RANGE 8 DIGITAL INPUT 43 REFGND AD7609
Data Sheet AD7609 Pin No. 8 Type 1 DI Mnemonic RANGE 6 DI PAR/ SER SEL 9, 10 DI CONVST A, CONVST B 13 DI CS 12 DI RD/SCLK 14 DO BUSY 11 DI RESET 15 DO FRSTDATA 7 DI STBY Description Analog Input Range Selection. Logic input. The polarity on this pin determines the input range of the analog input channels. If this pin is tied to a logic high, the analog input range is ±10 V for all channels. If this pin is tied to a logic low, the analog input range is ±5 V for all channels.
AD7609 Data Sheet Pin No. 5, 4, 3 Type 1 DI Mnemonic OS [2:0] 33 DO/DI DB15 32 DO/DI DB14 31 to 27 DO DB[13:9] 24 DO DB7/DOUTA 25 DO DB8/DOUTB 22 to 16 DO DB[6:0] 1 Description Oversampling Mode Pins. Logic inputs. These inputs are used to select the oversampling ratio. OS 2 is the MSB control bit, and OS 0 is the LSB control bit. See the Digital Filter section for additional details on the oversampling mode of operation and Table 9 for oversampling bit decoding.
Data Sheet AD7609 TYPICAL PERFORMANCE CHARACTERISTICS 3 0 AVCC, VDRIVE = 5V INTERNAL REFERENCE ±10V RANGE fSAMPLE = 200 kSPS fIN = 1kHz 16384 POINT FFT SNR = 91.52dB THD = –111.05dB –40 1 –80 0 ±10V RANGE AVCC, VDRIVE = 5V TA = 25°C fSAMPLE = 200 kSPS WCP INL = 1.69 LSB WCN INL = –1.3 LSB –1 –100 –2 –120 –140 CODE Figure 8.
AD7609 Data Sheet ±5V RANGE AVCC, VDRIVE = 5V TA = 25°C fSAMPLE = 200 kSPS WCP INL = 0.45 LSB WCN INL = –0.38 LSB 0.6 32 0.2 0 –0.2 –0.4 –0.6 –0.
Data Sheet AD7609 8 105 AVCC, VDRIVE = 5V fSAMPLE CHANGES WITH OS RATE TA = 25°C INTERNAL REFERENCE ±5V RANGE 95 90 NO OS OS × 2 OS × 4 OS × 8 OS × 16 OS × 32 OS × 64 85 100 2 0 ±5V RANGE –2 ±10V RANGE 200 kSPS AV CC,VDRIVE = 5V EXTERNAL REFERENCE –4 80 10 4 10k 10k 100k INPUT FREQUENCY (Hz) –6 –40 0 –20 20 40 TEMPERATURE (°C) 60 80 09760-023 BIPOLAR ZERO ERROR (LSB) 6 09760-018 SNR (dBs) 100 Figure 23. Bipolar Zero Code Error vs. Temperature Figure 20. SNR vs.
AD7609 Data Sheet 22 110 20 ±5V RANGE 95 90 85 AVCC = VDRIVE = 5V TA = 25°C INTERNAL REFERENCE fSAMPLE SCALES WITH OS RATIO 80 NO OS OS × 2 OS × 4 OS × 8 OS × 16 OS × 32 OS × 64 OVERSAMPLING RATIO 09760-023 DYNAMIC RANGE (dB) ±10V RANGE 100 18 16 14 12 AVCC, VDRIVE = 5V 10 TA = 25°C INTERNAL REFERENCE fSAMPLE VARIES WITH OS RATE 8 NO OS OS × 2 OS × 4 OS × 8 OS × 16 OS × 32 OS × 64 OVERSAMPLING RATIO Figure 26. Dynamic Range vs.
Data Sheet AD7609 TERMINOLOGY Integral Nonlinearity The maximum deviation from a straight line passing through the endpoints of the ADC transfer function. The endpoints of the transfer function are zero scale, a ½ LSB below the first code transition, and full scale at ½ LSB above the last code transition. Differential Nonlinearity The difference between the measured and the ideal 1 LSB change between any two adjacent codes in the ADC.
AD7609 Data Sheet Power Supply Rejection (PSR) Variations in power supply affect the full-scale transition but not the converter’s linearity. Power supply rejection is the maximum change in full-scale transition point due to a change in power supply voltage from the nominal value. The power supply rejection ratio is defined as the ratio of the power in the ADC output at full-scale frequency, f, to the power of a 200 mV p-p sine wave applied to the ADC VDD and VSS supplies of Frequency fS.
Data Sheet AD7609 THEORY OF OPERATION CONVERTER DETAILS Analog Input Clamp Protection The AD7609 is a data acquisition system that employs a high speed, low power, charge redistribution successive approximation analog-to-digital converter (ADC) and allows the simultaneous sampling of eight true differential analog input channels. The analog inputs on the AD7609 can accept true bipolar input signals. The RANGE pin is used to select either ±10 V or ±5 V as the input range.
AD7609 Data Sheet Analog Input Antialiasing Filter An analog antialiasing filter is also provided on the AD7609. The filter is a second-order Butterworth. Figure 35 and Figure 36 show the frequency and phase response respectively of the analog antialiasing filter. In the ±5 V range, the −3 dB frequency is typically 23 kHz. In the ±10 V range, the −3 dB frequency is typically 32 kHz. 0 10V DIFF –5 5V DIFF –15 ADC TRANSFER FUNCTION –20 The output coding of the AD7609 is twos complement.
Data Sheet AD7609 INTERNAL/EXTERNAL REFERENCE REFIN/REFOUT SAR The AD7609 contains an on-chip 2.5 V band gap reference. The REFIN/REFOUT pin allows access to the 2.5 V reference that generates the on-chip 4.5 V reference internally, or it allows an external reference of 2.5 V to be applied to the AD7609. An externally applied reference of 2.5 V is also amplified to 4.5 V using the internal buffer. This 4.5 V buffered reference is the reference used by the SAR ADC. 10µF REFCAPA 09760-035 2.
AD7609 Data Sheet TYPICAL CONNECTION DIAGRAM POWER-DOWN MODES Figure 41 shows the typical connection diagram for the AD7609. There are four AVCC supply pins on the part that can be tied together and decoupled using a 100 nF capacitor at each supply pin and a 10 µF capacitor at the supply source. The AD7609 can operate with the internal reference or an externally applied reference. In this configuration, the AD7609 is configured to operate with the internal reference.
Data Sheet AD7609 Simultaneously Sampling Two Sets of Channels CONVERSION CONTROL The AD7609 also allows the analog input channels to be sampled simultaneously in two sets. This can be used in power line protection and measurement systems to compensate for phase differences between PT and CT transformers. In a 50 Hz system, this allows for up to 9° of phase compensation, and in a 60 Hz system, it allows for up to 10° of phase compensation.
AD7609 Data Sheet DIGITAL INTERFACE The AD7609 provides two interface options: a parallel interface and a high speed serial interface. The required interface mode is selected via the PAR/SER SEL pin. AD7609 INTERRUPT BUSY 14 The operation of the interface modes is described in the following sections. DIGITAL HOST DB[15:0] 33:16 PARALLEL INTERFACE (PAR/SER SEL = 0) Data can be read from the AD7609 via the parallel data bus with standard CS and RD signals.
Data Sheet AD7609 Figure 6 shows the timing diagram for reading one channel of data, framed by the CS signal, from the AD7609 in serial mode. The SCLK input signal provides the clock source for the serial read operation. CS goes low to access the data from the AD7609. The falling edge of CS takes the bus out of three-state and clocks out the MSB of the 18-bit conversion result. This MSB is valid on the first falling edge of the SCLK after the CS falling edge.
AD7609 Data Sheet DIGITAL FILTER The AD7609 contains an optional digital filter. This digital filter is a first-order sinc filter. This digital filter should be used in applications where slower throughput rates are used or where higher signal-to-noise ratio or dynamic range is desirable. The oversampling ratio of the digital filter is controlled using the oversampling pins, OS [2:0] (see Table 9). OS 2 is the MSB control bit and OS 0 is the LSB control bit.
Data Sheet AD7609 tCYCLE CONVST A, CONVST B tCONV 19µs 9µs 4µs OS = 0 BUSY OS = 2 OS = 4 t4 t4 t4 CS 09760-043 RD DATA: DB[15:0] Figure 46. AD7609—No Oversampling, Oversampling × 4, and Oversampling × 8 Using Read After Conversion 3000 1600 OVERSAMPLING BY 4 NO OVERSAMPLING 1384 1373 840 800 727 600 492 450 400 1500 1000 2 10 27 –9 –8 –7 –6 –5 –4 –3 –2 –1 0 1 CODE 2 3 4 5 32 11 2 6 8 9 7 1 0 5 49 –5 –4 –3 –2 –1 0 CODE 1 79 8 3 4 2 Figure 49.
AD7609 Data Sheet When the oversampling mode is selected, this has the effect of adding a digital filter function after the ADC. The different oversampling rates and the CONVST x sampling frequency produces different digital filter frequency profiles. 4500 OVERSAMPLING BY 16 3833 3500 3279 3000 Figure 54 to Figure 59 show the digital filter frequency profiles for the different oversampling rates.
Data Sheet AD7609 –20 –20 ATTENUATION (dB) –30 –40 –50 –60 –70 –30 –40 –50 –60 –70 –80 –80 –90 –90 1k 10k 100k 1M 10M FREQUENCY (Hz) –100 100 09760-053 –100 100 –20 ATTENUATION (dB) –40 –50 –60 –70 –40 –50 –60 –70 –80 –90 –90 10k 100k 1M FREQUENCY (Hz) 10M –30 –80 1k 1M 10M AVCC = 5V VDRIVE = 5V TA = 25°C 10V RANGE OS BY 64 –10 –30 –100 100 100k 0 09760-054 ATTENUATION (dB) –20 10k Figure 58.
AD7609 Data Sheet LAYOUT GUIDELINES The printed circuit board that houses the AD7609 should be designed so that the analog and digital sections are separated and confined to different areas of the board. If the AD7609 is in a system where multiple devices require analog-to-digital ground connections, the connection should still be made at only one point, a star ground point, which should be established as close as possible to the AD7609. Good connections should be made to the ground plane.
Data Sheet AD7609 09760-059 To ensure good device-to-device performance matching in a system that contains multiple AD7609 devices, a symmetrical layout between the AD7609 devices is important. Figure 62 shows a layout with two AD7609 devices. The AVCC supply plane runs to the right of both devices. The VDRIVE supply track runs to the left of the two AD7609 devices.
AD7609 Data Sheet OUTLINE DIMENSIONS 0.75 0.60 0.45 12.20 12.00 SQ 11.80 1.60 MAX 64 49 1 48 PIN 1 10.20 10.00 SQ 9.80 TOP VIEW (PINS DOWN) 0.15 0.05 0.20 0.09 7° 3.5° 0° SEATING PLANE 16 0.08 COPLANARITY VIEW A 33 32 17 VIEW A 0.50 BSC LEAD PITCH 0.27 0.22 0.17 ROTATED 90° CCW COMPLIANT TO JEDEC STANDARDS MS-026-BCD 051706-A 1.45 1.40 1.35 Figure 63.
Data Sheet AD7609 NOTES Rev.
AD7609 Data Sheet NOTES ©2011–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09760-0-2/12(A) Rev.
